Fixes for building STM32G0.

Author: dgarske

docs/Targets.md

@@ -1,5 +1,7 @@
 # Targets
 
+This README describes configuration of supported targets.
+
 ## STM32-F407
 
 Example 512KB partitioning on STM32-F407
@@ -69,6 +71,7 @@ Possible workarounds:
 - Compile ed25519 with debug (optimizations are disabled) : `make TARGET=stm32l0 DEBUG=1`
 - Use ECDSA instead (which is much faster) : `make TARGET=stm32l0 SIGN=ECC256`
 
+
 ## STM32G0x0/STM32G0x1
 
 Example 128KB partitioning on STM32-G070:
@@ -87,7 +90,7 @@ Example 128KB partitioning on STM32-G070:
 
 ### Building
 
-Use `make TARGET=stm32l0`. The option `CORTEX_M0` is automatically selected for this target.
+Use `make TARGET=stm32g0`. The option `CORTEX_M0` is automatically selected for this target.
 The option `NVM_FLASH_WRITEONCE=1` is mandatory on this target, since the IAP driver does not support
 multiple writes after each erase operation.
 
@@ -101,8 +104,9 @@ With Ed25519 (default SIGN algorithm) it's not possible at the moment to compile
 with optimizations, due to a GCC linker error complaining about a missing symbol `__gnu_thumb1_case_uqi`.
 
 Possible workarounds:
-- Compile ed25519 with debug (optimizations are disabled) : `make TARGET=stm32l0 DEBUG=1`
-- Use ECDSA instead (which is much faster) : `make TARGET=stm32l0 SIGN=ECC256`
+- Compile ed25519 with debug (optimizations are disabled) : `make TARGET=stm32g0 NVM_FLASH_WRITEONCE=1 DEBUG=1`
+- Use ECDSA instead (which is much faster) : `make TARGET=stm32g0 NVM_FLASH_WRITEONCE=1 SIGN=ECC256`
+
 
 ## SiFive HiFive1 RISC-V
 
@@ -188,9 +192,3 @@ riscv64-unknown-elf-gdb wolfboot.elf -ex "set remotetimeout 240" -ex "target ext
 add-symbol-file test-app/image.elf 0x20020100
 ```
 
-```
-riscv64-unknown-elf-objdump -D test-app/image.elf
-```
-
-
-

hal/stm32g0.c

@@ -114,7 +114,7 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
     uint32_t *src, *dst;
     flash_clear_errors();
     FLASH_CR |= FLASH_CR_PG;
-    
+
     while (i < len) {
         flash_clear_errors();
         if ((len - i > 3) && ((((address + i) & 0x07) == 0)  && ((((uint32_t)data) + i) & 0x07) == 0)) {
@@ -141,7 +141,7 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
             flash_wait_complete();
         }
     }
-    if ((FLASH_SR & FLASH_SR_EOP) == FLASH_SR_EOP);
+    if ((FLASH_SR & FLASH_SR_EOP) == FLASH_SR_EOP)
         FLASH_SR |= FLASH_SR_EOP;
     FLASH_CR &= ~FLASH_CR_PG;
     return 0;

src/libwolfboot.c

@@ -39,6 +39,8 @@ uint32_t ext_cache;
 #define PART_UPDATE_ENDFLAGS ((WOLFBOOT_PARTITION_UPDATE_ADDRESS + WOLFBOOT_PARTITION_SIZE) - TRAILER_SKIP)
 
 #ifdef NVM_FLASH_WRITEONCE
+#include <stddef.h>
+extern void *memcpy(void *dst, const void *src, size_t n);
 static uint8_t NVM_CACHE[WOLFBOOT_SECTOR_SIZE];
 int RAMFUNCTION hal_trailer_write(uint32_t addr, uint8_t val) {
     uint32_t addr_align = addr & (~(WOLFBOOT_SECTOR_SIZE - 1));