Merge branch 'dev' of github.com:hioa-cs/IncludeOS into dev

Author: alfreb

api/arch

@@ -20,7 +20,6 @@
 #ifndef INCLUDEOS_ARCH_HEADER
 #define INCLUDEOS_ARCH_HEADER
 
-#define ARCH_X86
 #include <cstddef>
 #include <cstdint>
 
@@ -36,6 +35,11 @@ inline uint64_t __arch_cpu_cycles() noexcept {
   asm("rdtsc" : "=A" (ret));
   return ret;
 }
+#else
+inline uint64_t __arch_cpu_cycles() noexcept {
+  return 0;
+}
 #endif
 
 #endif
+

api/common

@@ -53,27 +53,11 @@
 #undef Expects
 #undef Ensures
 
-#define Expects(cond)                                       \
-  do {                                                      \
-    if (UNLIKELY(not (cond))) {                             \
-      std::cerr << "OS: Precondition (" OS_STRINGIFY(cond)  \
-                << ") failed...\n"  << "\t...in function: " \
-                << __func__ << " @" << __FILE__ << ":"      \
-                << __LINE__ << '\n';                        \
-      std::terminate();                                     \
-    }                                                       \
-  } while(0)
+#define Expects(cond) \
+  assert(LIKELY(cond) && "OS: Precondition failed")
 
-#define Ensures(cond)                                       \
-  do {                                                      \
-    if (UNLIKELY(not (cond))) {                             \
-      std::cerr << "OS: Postcondition (" OS_STRINGIFY(cond) \
-                << ") failed...\n"  << "\t...in function: " \
-                << __func__ << " @" << __FILE__ << ":"      \
-                << __LINE__ << '\n';                        \
-      std::terminate();                                     \
-    }                                                       \
-  } while(0)
+#define Ensures(cond) \
+  assert(LIKELY(cond) && "OS: Postcondition failed")
 
 #endif //< defined(OS_TERMINATE_ON_CONTRACT_VIOLATION)
 

api/hw/ioport.hpp

@@ -6,9 +6,9 @@
 // Licensed under the Apache License, Version 2.0 (the "License");
 // you may not use this file except in compliance with the License.
 // You may obtain a copy of the License at
-// 
+//
 //     http://www.apache.org/licenses/LICENSE-2.0
-// 
+//
 // Unless required by applicable law or agreed to in writing, software
 // distributed under the License is distributed on an "AS IS" BASIS,
 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@@ -28,9 +28,12 @@ namespace hw {
   static inline uint8_t inb(int port)
   {
     int ret;
+#ifdef ARCH_X86
     __asm__ volatile ("xorl %eax,%eax");
     __asm__ volatile ("inb %%dx,%%al":"=a" (ret):"d"(port));
-
+#else
+#warning "inb() not implemented for selected arch"
+#endif
     return ret;
   }
 
@@ -39,7 +42,11 @@ namespace hw {
       @param data : One byte of data to send to @param port
   */
   static inline void outb(int port, uint8_t data) {
+#ifdef ARCH_X86
     __asm__ volatile ("outb %%al,%%dx"::"a" (data), "d"(port));
+#else
+#warning "outb() not implemented for selected arch"
+#endif
   }
 
   /** Receive a word from port.
@@ -48,9 +55,12 @@ namespace hw {
   static inline uint16_t inw(int port)
   {
     int ret;
+#ifdef ARCH_X86
     __asm__ volatile ("xorl %eax,%eax");
     __asm__ volatile ("inw %%dx,%%ax":"=a" (ret):"d"(port));
-
+#else
+#warning "inw() not implemented for selected arch"
+#endif
     return ret;
   }
 
@@ -59,9 +69,14 @@ namespace hw {
       @param data : One word of data to send to @param port
   */
   static inline void outw(int port, uint16_t data) {
+#ifdef ARCH_X86
     __asm__ volatile ("outw %%ax,%%dx"::"a" (data), "d"(port));
+#else
+#warning "outw() not implemented for selected arch"
+#endif
   }
 
 } //< namespace hw
 
 #endif // HW_IOPORT_HPP
+

api/hw/pci.hpp

@@ -28,49 +28,73 @@ namespace hw {
   static inline uint8_t inp(port_t port)
   {
     uint8_t ret;
-  
+#ifdef ARCH_X86
     __asm__ volatile("xorl %eax,%eax");
     __asm__ volatile("inb %%dx,%%al"
                      :"=a"(ret)
                      :"d"(port));
-    return ret;  
+#else
+#warning "inp() not implemented for selected arch"
+#endif
+    return ret;
   }
 
   static inline uint16_t inpw(port_t port)
   {
     uint16_t ret;
+#ifdef ARCH_X86
     __asm__ volatile("xorl %eax,%eax");
     __asm__ volatile("inw %%dx,%%ax"
                      :"=a"(ret)
                      :"d"(port));
-    return ret;    
+#else
+#warning "inpw() not implemented for selected arch"
+#endif
+    return ret;
   }
 
   static inline uint32_t inpd(port_t port)
   {
     uint32_t ret;
+#ifdef ARCH_X86
     __asm__ volatile("xorl %eax,%eax");
     __asm__ volatile("inl %%dx,%%eax"
                      :"=a"(ret)
                      :"d"(port));
-  
+#else
+#warning "inpd() not implemented for selected arch"
+#endif
+
     return ret;
   }
 
 
   static inline void outp(port_t port, uint8_t data)
   {
+#ifdef ARCH_X86
     __asm__ volatile ("outb %%al,%%dx"::"a" (data), "d"(port));
+#else
+#warning "outp() not implemented for selected arch"
+#endif
   }
   static inline void outpw(port_t port, uint16_t data)
   {
+#ifdef ARCH_X86
     __asm__ volatile ("outw %%ax,%%dx"::"a" (data), "d"(port));
+#else
+#warning "outpw() not implemented for selected arch"
+#endif
   }
   static inline void outpd(port_t port, uint32_t data)
   {
+#ifdef ARCH_X86
     __asm__ volatile ("outl %%eax,%%dx"::"a" (data), "d"(port));
+#else
+#warning "outpd() not implemented for selected arch"
+#endif
   }
 
 } //< namespace hw
 
 #endif
+