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Merge pull request #1203 from ingve/armtests
Build unittests on ARM
2 parents 2ba4345 + 15a9cb7 commit 19fcbf1

13 files changed

Lines changed: 156 additions & 16 deletions

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api/arch

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,6 @@
2020
#ifndef INCLUDEOS_ARCH_HEADER
2121
#define INCLUDEOS_ARCH_HEADER
2222

23-
#define ARCH_X86
2423
#include <cstddef>
2524
#include <cstdint>
2625

@@ -36,6 +35,11 @@ inline uint64_t __arch_cpu_cycles() noexcept {
3635
asm("rdtsc" : "=A" (ret));
3736
return ret;
3837
}
38+
#else
39+
inline uint64_t __arch_cpu_cycles() noexcept {
40+
return 0;
41+
}
3942
#endif
4043

4144
#endif
45+

api/hw/ioport.hpp

Lines changed: 19 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,9 @@
66
// Licensed under the Apache License, Version 2.0 (the "License");
77
// you may not use this file except in compliance with the License.
88
// You may obtain a copy of the License at
9-
//
9+
//
1010
// http://www.apache.org/licenses/LICENSE-2.0
11-
//
11+
//
1212
// Unless required by applicable law or agreed to in writing, software
1313
// distributed under the License is distributed on an "AS IS" BASIS,
1414
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@@ -28,9 +28,12 @@ namespace hw {
2828
static inline uint8_t inb(int port)
2929
{
3030
int ret;
31+
#ifdef ARCH_X86
3132
__asm__ volatile ("xorl %eax,%eax");
3233
__asm__ volatile ("inb %%dx,%%al":"=a" (ret):"d"(port));
33-
34+
#else
35+
#warning "inb() not implemented for selected arch"
36+
#endif
3437
return ret;
3538
}
3639

@@ -39,7 +42,11 @@ namespace hw {
3942
@param data : One byte of data to send to @param port
4043
*/
4144
static inline void outb(int port, uint8_t data) {
45+
#ifdef ARCH_X86
4246
__asm__ volatile ("outb %%al,%%dx"::"a" (data), "d"(port));
47+
#else
48+
#warning "outb() not implemented for selected arch"
49+
#endif
4350
}
4451

4552
/** Receive a word from port.
@@ -48,9 +55,12 @@ namespace hw {
4855
static inline uint16_t inw(int port)
4956
{
5057
int ret;
58+
#ifdef ARCH_X86
5159
__asm__ volatile ("xorl %eax,%eax");
5260
__asm__ volatile ("inw %%dx,%%ax":"=a" (ret):"d"(port));
53-
61+
#else
62+
#warning "inw() not implemented for selected arch"
63+
#endif
5464
return ret;
5565
}
5666

@@ -59,9 +69,14 @@ namespace hw {
5969
@param data : One word of data to send to @param port
6070
*/
6171
static inline void outw(int port, uint16_t data) {
72+
#ifdef ARCH_X86
6273
__asm__ volatile ("outw %%ax,%%dx"::"a" (data), "d"(port));
74+
#else
75+
#warning "outw() not implemented for selected arch"
76+
#endif
6377
}
6478

6579
} //< namespace hw
6680

6781
#endif // HW_IOPORT_HPP
82+

api/hw/pci.hpp

Lines changed: 28 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -28,49 +28,73 @@ namespace hw {
2828
static inline uint8_t inp(port_t port)
2929
{
3030
uint8_t ret;
31-
31+
#ifdef ARCH_X86
3232
__asm__ volatile("xorl %eax,%eax");
3333
__asm__ volatile("inb %%dx,%%al"
3434
:"=a"(ret)
3535
:"d"(port));
36-
return ret;
36+
#else
37+
#warning "inp() not implemented for selected arch"
38+
#endif
39+
return ret;
3740
}
3841

3942
static inline uint16_t inpw(port_t port)
4043
{
4144
uint16_t ret;
45+
#ifdef ARCH_X86
4246
__asm__ volatile("xorl %eax,%eax");
4347
__asm__ volatile("inw %%dx,%%ax"
4448
:"=a"(ret)
4549
:"d"(port));
46-
return ret;
50+
#else
51+
#warning "inpw() not implemented for selected arch"
52+
#endif
53+
return ret;
4754
}
4855

4956
static inline uint32_t inpd(port_t port)
5057
{
5158
uint32_t ret;
59+
#ifdef ARCH_X86
5260
__asm__ volatile("xorl %eax,%eax");
5361
__asm__ volatile("inl %%dx,%%eax"
5462
:"=a"(ret)
5563
:"d"(port));
56-
64+
#else
65+
#warning "inpd() not implemented for selected arch"
66+
#endif
67+
5768
return ret;
5869
}
5970

6071

6172
static inline void outp(port_t port, uint8_t data)
6273
{
74+
#ifdef ARCH_X86
6375
__asm__ volatile ("outb %%al,%%dx"::"a" (data), "d"(port));
76+
#else
77+
#warning "outp() not implemented for selected arch"
78+
#endif
6479
}
6580
static inline void outpw(port_t port, uint16_t data)
6681
{
82+
#ifdef ARCH_X86
6783
__asm__ volatile ("outw %%ax,%%dx"::"a" (data), "d"(port));
84+
#else
85+
#warning "outpw() not implemented for selected arch"
86+
#endif
6887
}
6988
static inline void outpd(port_t port, uint32_t data)
7089
{
90+
#ifdef ARCH_X86
7191
__asm__ volatile ("outl %%eax,%%dx"::"a" (data), "d"(port));
92+
#else
93+
#warning "outpd() not implemented for selected arch"
94+
#endif
7295
}
7396

7497
} //< namespace hw
7598

7699
#endif
100+

api/smp

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -59,21 +59,21 @@ struct minimal_barrier_t
5959
{
6060
__sync_fetch_and_add(&val, 1);
6161
}
62-
62+
6363
void spin_wait(int max)
6464
{
6565
asm("mfence");
6666
while (this->val < max) {
6767
asm("pause; nop;");
6868
}
6969
}
70-
70+
7171
void reset(int val)
7272
{
7373
asm volatile("mfence");
7474
this->val = val;
7575
}
76-
76+
7777
private:
7878
volatile int val = 0;
7979
};
@@ -131,4 +131,11 @@ public:
131131
// access a std::array of structs indexed by current CPU id
132132
#define PER_CPU(x) (per_cpu_help<decltype(x)::value_type, x.size()>(x))
133133

134+
#ifndef ARCH_X86
135+
typedef int spinlock_t;
136+
inline void lock(spinlock_t&) {}
137+
inline void unlock(spinlock_t&) {}
138+
#endif
139+
134140
#endif
141+

api/virtio/virtio.hpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -215,10 +215,14 @@ class Virtio
215215
Update the available index */
216216
inline void update_avail_idx ()
217217
{
218+
#ifdef ARCH_X86
218219
// Std. §3.2.1 pt. 4
219220
asm volatile("mfence" ::: "memory");
220221
_queue.avail->idx += _num_added;
221222
_num_added = 0;
223+
#else
224+
#warning "update_avail_idx() not implemented for selected arch"
225+
#endif
222226
}
223227

224228
/** Kick hypervisor.
@@ -261,7 +265,7 @@ class Virtio
261265
{
262266
return _desc_in_flight;
263267
}
264-
268+
265269
/** Get number of free tokens in Queue */
266270
uint16_t num_free() const noexcept
267271
{
@@ -380,3 +384,4 @@ class Virtio
380384
};
381385

382386
#endif
387+

etc/service.cmake

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,12 @@ option(debug "Build with debugging symbols (OBS: increases binary size)" OFF)
3838
option(minimal "Build for minimal size" OFF)
3939
option(stripped "reduce size" OFF)
4040

41+
if ("${ARCH}" STREQUAL "")
42+
set (ARCH "ARCH_X86")
43+
endif("${ARCH}" STREQUAL "")
44+
45+
add_definitions(-D${ARCH})
46+
4147
# Compiler optimization
4248
set(OPTIMIZE "-O2")
4349
if (minimal)

src/CMakeLists.txt

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,12 @@
11
set(CMAKE_ASM_NASM_OBJECT_FORMAT "elf")
22
enable_language(ASM_NASM)
33

4+
if ("${ARCH}" STREQUAL "")
5+
set (ARCH "ARCH_X86")
6+
endif("${ARCH}" STREQUAL "")
7+
8+
add_definitions(-D${ARCH})
9+
410
include_directories(${INCLUDEOS_ROOT}/api/posix)
511
include_directories(${LIBCXX_INCLUDE_DIR})
612
include_directories(${NEWLIB_INCLUDE_DIR})

src/arch/x86/cpu.hpp

Lines changed: 19 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,28 +31,45 @@ namespace x86
3131
read_msr(uint32_t addr)
3232
{
3333
uint32_t EAX = 0, EDX = 0;
34+
#ifdef ARCH_X86
3435
asm volatile("rdmsr": "=a" (EAX),"=d"(EDX) : "c" (addr));
36+
#else
37+
#warning "read_msr() not implemented for selected arch"
38+
#endif
3539
return ((uint64_t)EDX << 32) | EAX;
3640
}
37-
41+
3842
static void
3943
write_msr(uint32_t addr, uint32_t eax, uint32_t edx)
4044
{
45+
#ifdef ARCH_X86
4146
asm volatile("wrmsr" : : "a" (eax), "d"(edx), "c" (addr));
47+
#else
48+
#warning "write_msr() not implemented for selected arch"
49+
#endif
4250
}
4351
static void
4452
write_msr(uint32_t addr, uint64_t value)
4553
{
54+
#ifdef ARCH_X86
4655
asm volatile("wrmsr" : : "A" (value), "c" (addr));
56+
#else
57+
#warning "write_msr() not implemented for selected arch"
58+
#endif
4759
}
48-
60+
4961
static uint64_t rdtsc()
5062
{
5163
uint64_t ret;
64+
#ifdef ARCH_X86
5265
asm volatile("rdtsc" : "=A"(ret));
66+
#else
67+
#warning "rdtsc() not implemented for selected arch"
68+
#endif
5369
return ret;
5470
}
5571
};
5672
}
5773

5874
#endif
75+

src/kernel/os.cpp

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -224,14 +224,17 @@ uint64_t OS::get_cycles_total() noexcept {
224224
__attribute__((noinline))
225225
void OS::halt() {
226226
*os_cycles_total = cycles_since_boot();
227+
#ifdef ARCH_X86
227228
asm volatile("hlt");
228229

229230
// add a global symbol here so we can quickly discard
230231
// event loop from stack sampling
231232
asm volatile(
232233
".global _irq_cb_return_location;\n"
233234
"_irq_cb_return_location:" );
234-
235+
#else
236+
#warning "OS::halt() not implemented for selected arch"
237+
#endif
235238
// Count sleep cycles
236239
*os_cycles_hlt += cycles_since_boot() - *os_cycles_total;
237240
}
@@ -391,3 +394,4 @@ void OS::legacy_boot() {
391394
unavail_end += interval;
392395
}
393396
}
397+

src/kernel/syscalls.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -169,6 +169,7 @@ OS::on_panic_func panic_handler = nullptr;
169169
**/
170170
void panic(const char* why)
171171
{
172+
#ifdef ARCH_X86
172173
/// prevent re-entering panic() more than once per CPU
173174
if (PER_CPU(panic_stuff).reenter)
174175
OS::reboot();
@@ -210,6 +211,9 @@ void panic(const char* why)
210211
// .. if we return from the panic handler, go to permanent sleep
211212
while (1) asm("cli; hlt");
212213
__builtin_unreachable();
214+
#else
215+
#warning "panic() not implemented for selected arch"
216+
#endif
213217
}
214218

215219
// Shutdown the machine when one of the exit functions are called
@@ -248,3 +252,4 @@ void _init_syscalls()
248252
// make sure that the buffers length is zero so it won't always show up in crashes
249253
_crash_context_buffer[0] = 0;
250254
}
255+

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