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arch/risc-v64: Add lazy FPU stacking and QEMU functional tests for GNU port#549

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Winstonllllai:rv64-fix-feature
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arch/risc-v64: Add lazy FPU stacking and QEMU functional tests for GNU port#549
Winstonllllai wants to merge 4 commits into
eclipse-threadx:devfrom
Winstonllllai:rv64-fix-feature

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This PR adds functional enhancements for the ThreadX RISC-V 64-bit (RV64) GNU port, mirroring the improvements delivered for RV32 in #513.

Lazy FPU Stacking:

  • Updated _tx_thread_context_save and _tx_thread_context_restore to save mstatus/sstatus and skip FP register save/restore when the FS field (bits 14:13) is Off.
  • Applied to nested save, non-nested save, nested restore, no-preempt restore, and preempt restore paths.
  • Supports TX_RISCV_SMODE (reads sstatus vs mstatus as appropriate).
  • Reduces context switch overhead for threads that do not use floating point.

Automated Testing Framework:

  • Introduced a Python-based E2E test harness using QEMU + GDB (azrtos_test_tx_gnu_riscv64_qemu.py).
  • Added qemu_virt/CMakeLists.txt and registered the check-functional-riscv64 target.
  • Validates multitasking, timer interrupts, FPU context preservation, and priority-based preemption.
  • Extended demo_threadx.c with fpu_test_val and adjusted thread timing for GDB-driven verification.
    QEMU Boot & Link Fixes:
  • Placed _start in a .text.boot section and added KEEP(*(.text.boot)) to link.lds so the entry point is pinned at 0x80000000 (QEMU virt reset PC).
  • Linked kernel.elf with --whole-archive to ensure all ThreadX symbols resolve on RV64.

How to Run Tests

cmake -B build_qemu -DCMAKE_TOOLCHAIN_FILE=cmake/riscv64_gnu.cmake
cd build_qemu
make check-functional-riscv64

Tested on QEMU virt machine (rv64gc).
Please let me know if there is anything I should improve or if I missed anything.

fdesbiens and others added 4 commits June 8, 2026 17:08
Merge changes for the v6.5.1.202602a release
Save mstatus/sstatus to stack slot 29 and skip floating-point register
save/restore when FS is Off (bits 14:13). This avoids unnecessary FP
context work for threads that do not use the FPU.

- context_save: check FS in nested and first-level interrupt paths
- context_restore: gate FP restore on nested, no-preempt, and preempt paths
- use sstatus when TX_RISCV_SMODE is defined, otherwise mstatus
Wire the QEMU virt demo into the CMake build system and add a
Python/GDB functional test runner, mirroring the risc-v32/gnu port.
- Add qemu_virt/CMakeLists.txt to build kernel.elf and register the
  check-functional-riscv64 target (requires Python3; skipped if absent)
- Link kernel.elf with --whole-archive so all ThreadX symbols resolve
- Pin _start at 0x80000000 via .text.boot in entry.s and
  KEEP(*(.text.boot)) in link.lds
- Extend demo_threadx.c with fpu_test_val and shorten thread_0 sleep
  for GDB-driven FPU, timer, and preemption checks
- Add test/azrtos_test_tx_gnu_riscv64_qemu.py; verified passing on
  QEMU virt (FPU, timer interrupt, preemption)
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