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stm32h7: add BDMA driver for D3 domain peripherals#49

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andoma merged 1 commit into
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silicondreamer:add-stm32h7-bdma
May 7, 2026
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stm32h7: add BDMA driver for D3 domain peripherals#49
andoma merged 1 commit into
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silicondreamer:add-stm32h7-bdma

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BDMA is the basic DMA controller in the STM32H7 D3 power domain, used for low-power peripherals such as SAI4 and SPI6. It has a different register layout from DMA1/2, routes through DMAMUX2, and has no burst or FIFO support.

The driver mirrors the existing STM32 DMA API — callers substitute *bdma for *dma. Buffers must reside in D3-accessible SRAM (chip- specific; consult the part's memory map).

IRQ positions 129-136 are consistent across all STM32H7 variants (RM0433 Table 10, RM0468 Table 10).

BDMA is the basic DMA controller in the STM32H7 D3 power domain,
used for low-power peripherals such as SAI4 and SPI6. It has a
different register layout from DMA1/2, routes through DMAMUX2,
and has no burst or FIFO support.

The driver mirrors the existing STM32 DMA API — callers substitute
*bdma for *dma. Buffers must reside in D3-accessible SRAM (chip-
specific; consult the part's memory map).

IRQ positions 129-136 are consistent across all STM32H7 variants
(RM0433 Table 10, RM0468 Table 10).
@andoma andoma merged commit 67f0a13 into andoma:master May 7, 2026
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2 participants