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Fix big-endian register parsing for GDB RSP adapter (#1003)
* Fix big-endian register parsing for PowerPC and other BE targets
When connecting to big-endian targets like PowerPC via QEMU, register
values were being incorrectly parsed using little-endian byte order.
This caused wrong PC values and prevented proper memory reads.
Changes:
- Parse <endian> element from target description XML when available
- Add IsBigEndianArchitecture() fallback for known BE architectures
(PowerPC, SPARC, M68K, S/390)
- Add m_isBigEndian member variable to track target endianness
- Add parseBigEndianHexToUint512() for reading BE register values
- Add uint512ToBigEndianHex() for writing BE register values
- Update ReadAllRegisters() and WriteRegister() to use correct
endianness based on target
Fixes#1000 (partial - the crash fix was in PR #1001, this addresses
the endianness issue that remained after the crash was fixed)
Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
* Fix parseBigEndianHexToUint512 buffer placement and add forward declarations
Right-justify bytes in the 64-byte buffer before calling intx::be::load,
which expects MSB at buffer[0] for a full 512-bit value. Without this,
a 4-byte register like PC=0x4082e4c0 was placed at buffer[0..3] and
interpreted as the top 32 bits of a 512-bit number.
Also add forward declarations for IsBigEndianArchitecture to fix
compilation errors (function defined after first use in LoadRegisterInfo).
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
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Co-authored-by: Claude Opus 4.5 <noreply@anthropic.com>
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