104104
105105
106106/* FLASH Geometry */
107- #define FLASH_SECTOR_0 0x0000000
108- #define FLASH_SECTOR_1 0x0004000
109- #define FLASH_SECTOR_2 0x0008000
110- #define FLASH_SECTOR_3 0x000C000
111- #define FLASH_SECTOR_4 0x0010000
112- #define FLASH_SECTOR_5 0x0020000
113- #define FLASH_SECTOR_6 0x0040000
114- #define FLASH_SECTOR_7 0x0060000
115- #define FLASH_TOP 0x0080000
116-
117- const uint32_t flash_sector [9 ] = {
118- FLASH_SECTOR_0 ,
119- FLASH_SECTOR_1 ,
120- FLASH_SECTOR_2 ,
121- FLASH_SECTOR_3 ,
122- FLASH_SECTOR_4 ,
123- FLASH_SECTOR_5 ,
124- FLASH_SECTOR_6 ,
107+ #define FLASH_SECTOR_0 0x0000000 /* 16 Kb */
108+ #define FLASH_SECTOR_1 0x0004000 /* 16 Kb */
109+ #define FLASH_SECTOR_2 0x0008000 /* 16 Kb */
110+ #define FLASH_SECTOR_3 0x000C000 /* 16 Kb */
111+ #define FLASH_SECTOR_4 0x0010000 /* 64 Kb */
112+ #define FLASH_SECTOR_5 0x0020000 /* 128 Kb */
113+ #define FLASH_SECTOR_6 0x0040000 /* 128 Kb */
114+ #define FLASH_SECTOR_7 0x0060000 /* 128 Kb */
115+ #define FLASH_SECTOR_8 0x0080000 /* 128 Kb */
116+ #define FLASH_SECTOR_9 0x00A0000 /* 128 Kb */
117+ #define FLASH_SECTOR_10 0x00C0000 /* 128 Kb */
118+ #define FLASH_SECTOR_11 0x00E0000 /* 128 Kb */
119+ #define FLASH_TOP 0x0100000
120+
121+ #define FLASH_SECTORS 12
122+ const uint32_t flash_sector [FLASH_SECTORS + 1 ] = {
123+ FLASH_SECTOR_0 ,
124+ FLASH_SECTOR_1 ,
125+ FLASH_SECTOR_2 ,
126+ FLASH_SECTOR_3 ,
127+ FLASH_SECTOR_4 ,
128+ FLASH_SECTOR_5 ,
129+ FLASH_SECTOR_6 ,
125130 FLASH_SECTOR_7 ,
131+ FLASH_SECTOR_8 ,
132+ FLASH_SECTOR_9 ,
133+ FLASH_SECTOR_10 ,
134+ FLASH_SECTOR_11 ,
126135 FLASH_TOP
127136};
128137
@@ -203,7 +212,7 @@ int hal_flash_erase(uint32_t address, int len)
203212
204213 if (address < flash_sector [0 ] || end_address > FLASH_TOP )
205214 return -1 ;
206- for (i = 0 ; i < 8 ; i ++ )
215+ for (i = 0 ; i < FLASH_SECTORS ; i ++ )
207216 {
208217 if ((address >= flash_sector [i ]) && (address < flash_sector [i + 1 ])) {
209218 start = i ;
@@ -244,7 +253,7 @@ static void clock_pll_on(int powersave)
244253{
245254 uint32_t reg32 ;
246255 uint32_t cpu_freq , plln , pllm , pllq , pllp , pllr , hpre , ppre1 , ppre2 , flash_waitstates ;
247-
256+
248257 /* Enable Power controller */
249258 APB1_CLOCK_ER |= PWR_APB1_CLOCK_ER_VAL ;
250259
@@ -256,7 +265,7 @@ static void clock_pll_on(int powersave)
256265 pllq = 7 ;
257266 pllr = 0 ;
258267 hpre = RCC_PRESCALER_DIV_NONE ;
259- ppre1 = RCC_PRESCALER_DIV_4 ;
268+ ppre1 = RCC_PRESCALER_DIV_4 ;
260269 ppre2 = RCC_PRESCALER_DIV_2 ;
261270 flash_waitstates = 3 ;
262271
@@ -297,9 +306,9 @@ static void clock_pll_on(int powersave)
297306 /* Set PLL config */
298307 reg32 = RCC_PLLCFGR ;
299308 reg32 &= ~(PLL_FULL_MASK );
300- RCC_PLLCFGR = reg32 | RCC_PLLCFGR_PLLSRC | pllm |
301- (plln << 6 ) | (((pllp >> 1 ) - 1 ) << 16 ) |
302- (pllq << 24 );
309+ RCC_PLLCFGR = reg32 | RCC_PLLCFGR_PLLSRC | pllm |
310+ (plln << 6 ) | (((pllp >> 1 ) - 1 ) << 16 ) |
311+ (pllq << 24 );
303312 DMB ();
304313 /* Enable PLL oscillator and wait for it to stabilize. */
305314 RCC_CR |= RCC_CR_PLLON ;
@@ -329,7 +338,7 @@ void hal_prepare_boot(void)
329338#ifdef SPI_FLASH
330339 spi_release ();
331340#endif
332-
341+
333342 clock_pll_off ();
334343}
335344
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