Enable ECC384 and SHA384. Fix sleep_us. Add Cortex-M hard-fault handler support.

Author: dgarske

config/examples/nrf5340.config

@@ -1,8 +1,8 @@
 ARCH?=ARM
 TZEN?=0
 TARGET?=nrf5340
-SIGN?=ECC256
-HASH?=SHA256
+SIGN?=ECC384
+HASH?=SHA384
 WOLFBOOT_VERSION?=1
 VTOR?=1
 CORTEX_M0?=0
@@ -44,6 +44,7 @@ V?=0
 DEBUG?=0
 DEBUG_UART?=1
 USE_GCC=1
+OPTIMIZATION_LEVEL=2
 
 # Optionally wait for network core to boot before starting application core
 CFLAGS_EXTRA+=-DNRF_SYNC_CORES
@@ -59,3 +60,6 @@ CFLAGS_EXTRA+=-DFLASHBUFFER_SIZE=0x1000
 
 #CFLAGS_EXTRA+=-DDEBUG_FLASH
 #CFLAGS_EXTRA+=-DDEBUG_QSPI=1
+
+# Hard fault debugging
+#CFLAGS_EXTRA+=-DDEBUG_HARDFAULT

config/examples/nrf5340_net.config

@@ -1,8 +1,8 @@
 ARCH?=ARM
 TZEN?=0
 TARGET?=nrf5340_net
-SIGN?=ECC256
-HASH?=SHA256
+SIGN?=ECC384
+HASH?=SHA384
 WOLFBOOT_VERSION?=1
 VTOR?=1
 CORTEX_M0?=0
@@ -49,5 +49,12 @@ V?=0
 DEBUG?=0
 DEBUG_UART?=1
 USE_GCC=1
+OPTIMIZATION_LEVEL=2
 
 #CFLAGS_EXTRA+=-DDEBUG_FLASH
+
+# If debugging network core disable the shared memory, since app core has not enabled access to it
+#CFLAGS_EXTRA+=-DDISABLE_SHARED_MEM
+
+# Hard fault debugging
+#CFLAGS_EXTRA+=-DDEBUG_HARDFAULT

hal/nrf5340.c

@@ -85,7 +85,9 @@ typedef struct {
     /* used as "swap" */
     uint8_t  swap[FLASH_PAGESZ_NET];
 } SharedMem_t;
+#ifndef DISABLE_SHARED_MEM
 static SharedMem_t* shm = (SharedMem_t*)SHARED_MEM_ADDR;
+#endif /* !DISABLE_SHARED_MEM */
 
 #ifdef TARGET_nrf5340_net
 static int do_update = 0;
@@ -275,7 +277,9 @@ int ext_flash_write(uintptr_t address, const uint8_t *data, int len)
     wolfBoot_printf("Ext Write: Len %d, Addr 0x%x (off 0x%x) -> 0x%x\n",
         len, address, addr, data);
 #endif
+#ifndef DISABLE_SHARED_MEM
     memcpy(shm->data + addr, data, len);
+#endif
     return 0;
 }
 
@@ -286,8 +290,9 @@ int ext_flash_read(uintptr_t address, uint8_t *data, int len)
     wolfBoot_printf("Ext Read: Len %d, Addr 0x%x (off 0x%x) -> %p\n",
         len, address, addr, data);
 #endif
-
+#ifndef DISABLE_SHARED_MEM
     memcpy(data, shm->data + addr, len);
+#endif
     return len;
 }
 
@@ -298,7 +303,9 @@ int ext_flash_erase(uintptr_t address, int len)
     wolfBoot_printf("Ext Erase: Len %d, Addr 0x%x (off 0x%x)\n",
         len, address, addr);
 #endif
+#ifndef DISABLE_SHARED_MEM
     memset(shm->data + addr, FLASH_BYTE_ERASED, len);
+#endif
     return 0;
 }
 
@@ -325,13 +332,13 @@ static void clock_init(void)
 void sleep_us(unsigned int us)
 {
     /* Calculate ops per us (128MHz=128 instructions per 1us */
-    unsigned long nop_us = (CPU_CLOCK / 10000000);
+    unsigned long nop_us = (CPU_CLOCK / 1000000);
     nop_us *= us;
     /* instruction for each iteration */
 #ifdef DEBUG
-    nop_us /= 5;
+    nop_us /= 30;
 #else
-    nop_us /= 2;
+    nop_us /= 5;
 #endif
     while (nop_us-- > 0) {
         NOP();
@@ -358,6 +365,7 @@ void hal_net_core(int hold) /* 1=hold, 0=release */
 }
 #endif
 
+#ifndef DISABLE_SHARED_MEM
 static uint8_t* get_image_hdr(struct wolfBoot_image* img)
 {
 #ifdef EXT_FLASH
@@ -538,6 +546,8 @@ static void hal_net_check_version(void)
         hal_shm_status_string(shm->app.status), shm->app.version,
         hal_shm_status_string(shm->net.status), shm->net.version);
 }
+#endif /* !DISABLE_SHARED_MEM */
+
 
 void hal_init(void)
 {
@@ -561,7 +571,9 @@ void hal_init(void)
     /* need early init of external flash to support checking network core */
     spi_flash_probe();
 
+#ifndef DISABLE_SHARED_MEM
     hal_net_check_version();
+#endif
 }
 
 
@@ -571,6 +583,7 @@ void hal_prepare_boot(void)
     //WOLFBOOT_ORIGIN
     //BOOTLOADER_PARTITION_SIZE
 
+#ifndef DISABLE_SHARED_MEM
 #ifdef TARGET_nrf5340_net
     if (do_update) {
         /* signal application core update done */
@@ -591,9 +604,12 @@ void hal_prepare_boot(void)
     /* if core synchronization enabled, then wait for update_done or do_boot */
     wolfBoot_printf("Waiting for network core...\n");
     (void)hal_shm_status_wait(&shm->net,
-        (SHARED_STATUS_UPDATE_DONE | SHARED_STATUS_DO_BOOT), 1000000);
-#endif
+        (SHARED_STATUS_UPDATE_DONE | SHARED_STATUS_DO_BOOT), 2000000);
+#endif /* NRF_SYNC_CORES */
+#endif /* TARGET_nrf5340_app */
+#endif /* !DISABLE_SHARED_MEM */
 
+#ifdef TARGET_nrf5340_app
     /* Restore defaults preventing network core from accessing shared SDRAM */
     SPU_EXTDOMAIN_PERM(0) =
         (SPU_EXTDOMAIN_PERM_SECATTR_NONSECURE | SPU_EXTDOMAIN_PERM_UNLOCK);

hal/nrf5340.ld

@@ -11,6 +11,7 @@ SECTIONS
     {
         _start_text = .;
         KEEP(*(.isr_vector))
+        *(.boot*)
         *(.text*)
         *(.rodata*)
         *(.init*)

hal/nrf5340_net.ld

@@ -10,6 +10,7 @@ SECTIONS
     {
         _start_text = .;
         KEEP(*(.isr_vector))
+        *(.boot*)
         *(.text*)
         *(.rodata*)
         *(.init*)

include/loader.h

@@ -102,8 +102,10 @@ static inline void wolfBoot_panic(void)
     wolfBoot_panicked++;
 }
 #else
+#include "printf.h"
 static inline void wolfBoot_panic(void)
 {
+    wolfBoot_printf("wolfBoot: PANIC!\n");
     while(1)
         ;
 }

src/boot_arm.c

@@ -23,6 +23,7 @@
 
 #include "image.h"
 #include "loader.h"
+#include "printf.h"
 #include "wolfboot/wolfboot.h"
 
 extern unsigned int _start_text;
@@ -296,11 +297,97 @@ asm(
 
 #endif /* CORTEX_R5 */
 
+#ifdef DEBUG_HARDFAULT
+__attribute__((section(".boot"))) __attribute__((used))
+void HardFault_HandlerC( uint32_t *hardfault_args )
+{
+    /* Using volatile to prevent the compiler/linker optimizing them out */
+    volatile uint32_t stacked_r0;
+    volatile uint32_t stacked_r1;
+    volatile uint32_t stacked_r2;
+    volatile uint32_t stacked_r3;
+    volatile uint32_t stacked_r12;
+    volatile uint32_t stacked_lr;
+    volatile uint32_t stacked_pc;
+    volatile uint32_t stacked_psr;
+    volatile uint32_t _CFSR;
+    volatile uint32_t _HFSR;
+    volatile uint32_t _DFSR;
+    volatile uint32_t _AFSR;
+    volatile uint32_t _BFAR;
+    volatile uint32_t _MMAR;
+
+    stacked_r0 =  ((uint32_t)hardfault_args[0]);
+    stacked_r1 =  ((uint32_t)hardfault_args[1]);
+    stacked_r2 =  ((uint32_t)hardfault_args[2]);
+    stacked_r3 =  ((uint32_t)hardfault_args[3]);
+    stacked_r12 = ((uint32_t)hardfault_args[4]);
+    stacked_lr =  ((uint32_t)hardfault_args[5]);
+    stacked_pc =  ((uint32_t)hardfault_args[6]);
+    stacked_psr = ((uint32_t)hardfault_args[7]);
+
+    /* Configurable Fault Status Register */
+    /* Consists of MMSR, BFSR and UFSR */
+    _CFSR = (*((volatile uint32_t *)(0xE000ED28)));
+    /* Hard Fault Status Register */
+    _HFSR = (*((volatile uint32_t *)(0xE000ED2C)));
+    /* Debug Fault Status Register */
+    _DFSR = (*((volatile uint32_t *)(0xE000ED30)));
+    /* Auxiliary Fault Status Register */
+    _AFSR = (*((volatile uint32_t *)(0xE000ED3C)));
+    /* MemManage Fault Address Register */
+    _MMAR = (*((volatile uint32_t *)(0xE000ED34)));
+    /* Bus Fault Address Register */
+    _BFAR = (*((volatile uint32_t *)(0xE000ED38)));
+
+    wolfBoot_printf("\n\nHard fault handler (all numbers in hex):\n");
+    wolfBoot_printf("R0 = %lx\n", stacked_r0);
+    wolfBoot_printf("R1 = %lx\n", stacked_r1);
+    wolfBoot_printf("R2 = %lx\n", stacked_r2);
+    wolfBoot_printf("R3 = %lx\n", stacked_r3);
+    wolfBoot_printf("R12 = %lx\n", stacked_r12);
+    wolfBoot_printf("LR [R14] = %lx  subroutine call return address\n",
+        stacked_lr);
+    wolfBoot_printf("PC [R15] = %lx  program counter\n", stacked_pc);
+    wolfBoot_printf("PSR = %lx\n", stacked_psr);
+    wolfBoot_printf("CFSR = %lx\n", _CFSR);
+    wolfBoot_printf("HFSR = %lx\n", _HFSR);
+    wolfBoot_printf("DFSR = %lx\n", _DFSR);
+    wolfBoot_printf("AFSR = %lx\n", _AFSR);
+    wolfBoot_printf("MMAR = %lx\n", _MMAR);
+    wolfBoot_printf("BFAR = %lx\n", _BFAR);
+
+    /* Break into the debugger */
+    __asm("BKPT #0\n");
+}
+
+__attribute__((section(".boot")))  __attribute__((naked))
+void isr_fault(void)
+{
+    __asm volatile
+    (
+        " movs r0,#4      \n"  /* load bit mask into R0 */
+        " mov  r1, lr     \n"  /* load link register into R1 */
+        " tst r0, r1      \n"  /* compare with bitmask */
+        " beq _MSP        \n"  /* if bitmask is set: stack pointer is in PSP. Otherwise in MSP */
+        " mrs r0, psp     \n"  /* otherwise: stack pointer is in PSP */
+        " b _GetPC        \n"  /* go to part which loads the PC */
+        "_MSP:            \n"  /* stack pointer is in MSP register */
+        " mrs r0, msp     \n"  /* load stack pointer into R0 */
+        "_GetPC:          \n"  /* find out where the hard fault happened */
+        " ldr r1,[r0,#20] \n"  /* load program counter into R1. R1 contains address of the next instruction where the hard fault happened */
+        " ldr r2, =HardFault_HandlerC \n"
+        " bx r2           \n"
+        " bx lr           \n"  /* decode more information. R0 contains pointer to stack frame */
+    );
+}
+#else
 void isr_fault(void)
 {
     /* Panic. */
     wolfBoot_panic();
 }
+#endif /* DEBUG_HARDFAULT */
 
 void isr_empty(void)
 {

src/loader.c

@@ -33,7 +33,9 @@
 #include "image.h"
 #include "hal.h"
 #include "spi_flash.h"
+#ifdef UART_FLASH
 #include "uart_flash.h"
+#endif
 #include "wolfboot/wolfboot.h"
 
 #ifdef WOLFBOOT_TPM

test-app/app_nrf5340.c

@@ -67,6 +67,6 @@ void main(void)
     while (1) {
         gpiotoggle(port, pin);
 
-        sleep_us(100 * 1000);
+        sleep_us(500 * 1000);
     }
 }

test-app/app_nrf5340_net.c

@@ -65,6 +65,6 @@ void main(void)
     while (1) {
         gpiotoggle(port, pin);
 
-        sleep_us(100 * 1000);
+        sleep_us(500 * 1000);
     }
 }