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| 1 | +/* nrf52.c |
| 2 | + * |
| 3 | + * Copyright (C) 2018 wolfSSL Inc. |
| 4 | + * |
| 5 | + * This file is part of wolfBoot. |
| 6 | + * |
| 7 | + * wolfBoot is free software; you can redistribute it and/or modify |
| 8 | + * it under the terms of the GNU General Public License as published by |
| 9 | + * the Free Software Foundation; either version 2 of the License, or |
| 10 | + * (at your option) any later version. |
| 11 | + * |
| 12 | + * wolfBoot is distributed in the hope that it will be useful, |
| 13 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | + * GNU General Public License for more details. |
| 16 | + * |
| 17 | + * You should have received a copy of the GNU General Public License |
| 18 | + * along with this program; if not, write to the Free Software |
| 19 | + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA |
| 20 | + */ |
| 21 | + |
| 22 | +#include <stdint.h> |
| 23 | + |
| 24 | +/* Assembly helpers */ |
| 25 | +#define DMB() __asm__ volatile ("dmb") |
| 26 | + |
| 27 | + |
| 28 | +/* Instantiation */ |
| 29 | +#define CLOCK_CONTROL_BASE (0x40000000) |
| 30 | +#define NVMC_BASE (0x4001E000) |
| 31 | + |
| 32 | + |
| 33 | +/* Flash write/erase control */ |
| 34 | +#define NVMC_CONFIG *((volatile uint32_t *)(NVMC_BASE + 0x504)) |
| 35 | +#define NVMC_ERASEPAGE *((volatile uint32_t *)(NVMC_BASE + 0x508)) |
| 36 | +#define NVMC_READY *((volatile uint32_t *)(NVMC_BASE + 0x400)) |
| 37 | +#define NVMC_CONFIG_REN 0 |
| 38 | +#define NVMC_CONFIG_WEN 1 |
| 39 | +#define NVMC_CONFIG_EEN 2 |
| 40 | + |
| 41 | +#define FLASH_PAGE_SIZE (4096) |
| 42 | + |
| 43 | +/* Clock control */ |
| 44 | +#define TASKS_HFCLKSTART *((volatile uint32_t *)(CLOCK_CONTROL_BASE + 0x000)) |
| 45 | +#define TASKS_HFCLKSTOP *((volatile uint32_t *)(CLOCK_CONTROL_BASE + 0x004)) |
| 46 | +#define TASKS_HFCLKSTARTED *((volatile uint32_t *)(CLOCK_CONTROL_BASE + 0x100)) |
| 47 | + |
| 48 | +static void flash_wait_complete(void) |
| 49 | +{ |
| 50 | + while (NVMC_READY == 0) |
| 51 | + ; |
| 52 | +} |
| 53 | + |
| 54 | +int hal_flash_write(uint32_t address, const uint8_t *data, int len) |
| 55 | +{ |
| 56 | + int i; |
| 57 | + uint32_t val; |
| 58 | + NVMC_CONFIG = NVMC_CONFIG_WEN; |
| 59 | + flash_wait_complete(); |
| 60 | + /* Set 8-bit write */ |
| 61 | + for (i = 0; i < len; i++) { |
| 62 | + ((uint8_t *)(address))[i] = data[i]; |
| 63 | + flash_wait_complete(); |
| 64 | + } |
| 65 | + return 0; |
| 66 | +} |
| 67 | + |
| 68 | +void hal_flash_unlock(void) |
| 69 | +{ |
| 70 | +} |
| 71 | + |
| 72 | +void hal_flash_lock(void) |
| 73 | +{ |
| 74 | +} |
| 75 | + |
| 76 | + |
| 77 | +int hal_flash_erase(uint32_t address, int len) |
| 78 | +{ |
| 79 | + int start = -1, end = -1, i; |
| 80 | + uint32_t end_address = address + len; |
| 81 | + start = (address / FLASH_PAGE_SIZE); |
| 82 | + if (start == 0) |
| 83 | + return -1; |
| 84 | + end = end_address / FLASH_PAGE_SIZE; |
| 85 | + NVMC_CONFIG = NVMC_CONFIG_EEN; |
| 86 | + flash_wait_complete(); |
| 87 | + for (i = start; i <= end; i++) { |
| 88 | + NVMC_ERASEPAGE = i; |
| 89 | + flash_wait_complete(); |
| 90 | + } |
| 91 | + return 0; |
| 92 | +} |
| 93 | + |
| 94 | +void hal_init(void) |
| 95 | +{ |
| 96 | + TASKS_HFCLKSTART = 1; |
| 97 | + while(TASKS_HFCLKSTARTED == 0) |
| 98 | + ; |
| 99 | +} |
| 100 | + |
| 101 | +void hal_prepare_boot(void) |
| 102 | +{ |
| 103 | + TASKS_HFCLKSTOP = 1; |
| 104 | +} |
| 105 | + |
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