Skip to content

Commit e6723ec

Browse files
dgarskedgarske
authored
Merge pull request #7 from wolfSSL/ramcode
Ramcode
2 parents 043bc27 + b75f6bb commit e6723ec

20 files changed

Lines changed: 397 additions & 130 deletions

File tree

‎Makefile‎

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,13 +21,15 @@ EXT_FLASH?=0
2121
SPI_FLASH?=0
2222
ALLOW_DOWNGRADE?=0
2323
NVM_FLASH_WRITEONCE?=0
24+
WOLFBOOT_VERSION?=0
2425
V?=0
2526
SPMATH?=1
27+
RAM_CODE?=0
2628

2729

2830

2931
## Initializers
30-
CFLAGS:=-D__WOLFBOOT
32+
CFLAGS:=-D__WOLFBOOT -DWOLFBOOT_VERSION=$(WOLFBOOT_VERSION)UL
3133
LSCRIPT:=hal/$(TARGET).ld
3234
LDFLAGS:=-T $(LSCRIPT) -Wl,-gc-sections -Wl,-Map=wolfboot.map -ffreestanding -nostartfiles
3335
OBJS:= \
@@ -80,6 +82,10 @@ CFLAGS+=-Wall -Wextra -Wno-main -Wstack-usage=1024 -ffreestanding -Wno-unused \
8082
-DWOLFSSL_USER_SETTINGS \
8183
-DPLATFORM_$(TARGET)
8284

85+
ifeq ($(RAM_CODE),1)
86+
CFLAGS+= -DRAM_CODE
87+
endif
88+
8389
ifeq ($(SPI_FLASH),1)
8490
EXT_FLASH=1
8591
CFLAGS+= -DSPI_FLASH=1
@@ -142,7 +148,8 @@ wolfboot-align.bin: wolfboot.bin
142148
@echo
143149

144150
test-app/image.bin:
145-
@make -C test-app TARGET=$(TARGET) EXT_FLASH=$(EXT_FLASH) SPI_FLASH=$(SPI_FLASH) ARCH=$(ARCH) V=$(V) \
151+
@make -C test-app TARGET=$(TARGET) EXT_FLASH=$(EXT_FLASH) SPI_FLASH=$(SPI_FLASH) ARCH=$(ARCH) \
152+
V=$(V) RAM_CODE=$(RAM_CODE) WOLFBOOT_VERSION=$(WOLFBOOT_VERSION)\
146153
KINETIS=$(KINETIS) KINETIS_CPU=$(KINETIS_CPU) KINETIS_DRIVERS=$(KINETIS_DRIVERS) \
147154
KINETIS_CMSIS=$(KINETIS_CMSIS) NVM_FLASH_WRITEONCE=$(NVM_FLASH_WRITEONCE) \
148155
FREEDOM_E_SDK=$(FREEDOM_E_SDK)

‎hal/cc26x2.c‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@
2525
#include "ti-lib.h"
2626

2727
#include "target.h" /* For WOLFBOOT_SECTOR_SIZE */
28+
#include "image.h"
2829
extern void clock_init(void);
2930

3031
char uart_read(void)
@@ -42,24 +43,24 @@ int uart_read_nonblock(char *c)
4243
}
4344

4445

45-
int hal_flash_write(uint32_t address, const uint8_t *data, int len)
46+
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
4647
{
4748
FlashProgram(data, address, len);
4849
while(FlashCheckFsmForReady() != FAPI_STATUS_FSM_READY)
4950
;
5051
return 0;
5152
}
5253

53-
void hal_flash_unlock(void)
54+
void RAMFUNCTION hal_flash_unlock(void)
5455
{
5556
}
5657

57-
void hal_flash_lock(void)
58+
void RAMFUNCTION hal_flash_lock(void)
5859
{
5960
}
6061

6162

62-
int hal_flash_erase(uint32_t address, int len)
63+
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
6364
{
6465
int i = 0;
6566
while (len > 0) {

‎hal/hifive1.c‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@
2121

2222
#include <stdint.h>
2323
#include <target.h>
24+
#include "image.h"
2425
#ifndef ARCH_RISCV
2526
# error "wolfBoot hifive1 HAL: wrong architecture selected. Please compile with ARCH=RISCV."
2627
#endif
@@ -37,21 +38,21 @@ void hal_prepare_boot(void)
3738

3839
#endif
3940

40-
int hal_flash_write(uint32_t address, const uint8_t *data, int len)
41+
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
4142
{
4243
return 0;
4344
}
4445

45-
void hal_flash_unlock(void)
46+
void RAMFUNCTION hal_flash_unlock(void)
4647
{
4748
}
4849

49-
void hal_flash_lock(void)
50+
void RAMFUNCTION hal_flash_lock(void)
5051
{
5152
}
5253

5354

54-
int hal_flash_erase(uint32_t address, int len)
55+
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
5556
{
5657
return 0;
5758
}

‎hal/hifive1.ld‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@ SECTIONS
1919
KEEP(*(.isr_vector))
2020
*(.text*)
2121
*(.rodata*)
22+
*(.srodata*)
2223
. = ALIGN(4);
2324
_end_text = .;
2425
} > FLASH
@@ -33,10 +34,12 @@ SECTIONS
3334
_global_pointer = . + 0x800;
3435
*(.sdata*)
3536
. = ALIGN(4);
37+
KEEP(*(.ramcode*))
38+
. = ALIGN(4);
3639
_end_data = .;
3740
} > RAM
3841

39-
.bss :
42+
.bss (NOLOAD) :
4043
{
4144
_start_bss = .;
4245
*(.bss*)

‎hal/kinetis.c‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@
2121

2222
#include <stdint.h>
2323
#include <target.h>
24+
#include "image.h"
2425
#include "fsl_common.h"
2526
#include "fsl_flash.h"
2627
#include "fsl_ftfx_cache.h"
@@ -300,7 +301,7 @@ static void do_flash_init(void)
300301
FTFx_CACHE_ClearCachePrefetchSpeculation(&pcache, 1);
301302
}
302303

303-
int hal_flash_write(uint32_t address, const uint8_t *data, int len)
304+
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
304305
{
305306
int w = 0;
306307
int ret;
@@ -336,16 +337,16 @@ int hal_flash_write(uint32_t address, const uint8_t *data, int len)
336337
return 0;
337338
}
338339

339-
void hal_flash_unlock(void)
340+
void RAMFUNCTION hal_flash_unlock(void)
340341
{
341342
}
342343

343-
void hal_flash_lock(void)
344+
void RAMFUNCTION hal_flash_lock(void)
344345
{
345346
}
346347

347348

348-
int hal_flash_erase(uint32_t address, int len)
349+
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
349350
{
350351
int idx = 0;
351352
do_flash_init();

‎hal/nrf52.c‎

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
*/
2121

2222
#include <stdint.h>
23+
#include "image.h"
2324

2425
/* Assembly helpers */
2526
#define DMB() __asm__ volatile ("dmb")
@@ -45,13 +46,13 @@
4546
#define TASKS_HFCLKSTOP *((volatile uint32_t *)(CLOCK_CONTROL_BASE + 0x004))
4647
#define TASKS_HFCLKSTARTED *((volatile uint32_t *)(CLOCK_CONTROL_BASE + 0x100))
4748

48-
static void flash_wait_complete(void)
49+
static void RAMFUNCTION flash_wait_complete(void)
4950
{
5051
while (NVMC_READY == 0)
5152
;
5253
}
5354

54-
int hal_flash_write(uint32_t address, const uint8_t *data, int len)
55+
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
5556
{
5657
int i = 0;
5758
uint32_t *src, *dst;
@@ -82,16 +83,16 @@ int hal_flash_write(uint32_t address, const uint8_t *data, int len)
8283
return 0;
8384
}
8485

85-
void hal_flash_unlock(void)
86+
void RAMFUNCTION hal_flash_unlock(void)
8687
{
8788
}
8889

89-
void hal_flash_lock(void)
90+
void RAMFUNCTION hal_flash_lock(void)
9091
{
9192
}
9293

9394

94-
int hal_flash_erase(uint32_t address, int len)
95+
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
9596
{
9697
uint32_t end = address + len - 1;
9798
uint32_t p;

‎hal/samr21.c‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
*/
2121

2222
#include <stdint.h>
23+
#include "image.h"
2324

2425
/* Clock settings for cpu samd21g18a @ 48MHz */
2526
#define CPU_FREQ (48000000)
@@ -154,7 +155,7 @@ void hal_prepare_boot(void)
154155
}
155156

156157

157-
int hal_flash_write(uint32_t address, const uint8_t *data, int len)
158+
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
158159
{
159160
int i = 0;
160161
uint32_t *src, *dst;
@@ -191,17 +192,17 @@ int hal_flash_write(uint32_t address, const uint8_t *data, int len)
191192
return 0;
192193
}
193194

194-
void hal_flash_unlock(void)
195+
void RAMFUNCTION hal_flash_unlock(void)
195196
{
196197
PAC1_WPCLR |= (PAC_WP_NVMCTL);
197198
}
198199

199-
void hal_flash_lock(void)
200+
void RAMFUNCTION hal_flash_lock(void)
200201
{
201202
PAC1_WPSET |= (PAC_WP_NVMCTL);
202203
}
203204

204-
int hal_flash_erase(uint32_t address, int len)
205+
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
205206
{
206207
while (len > 0) {
207208
NVMCTRL_ADDR = (address >> 1); /* This register holds the address of a 16-bit row */

‎hal/stm32f4.c‎

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
*/
2121

2222
#include <stdint.h>
23+
#include <image.h>
2324
/* STM32 F4 register configuration */
2425

2526
/* Assembly helpers */
@@ -135,12 +136,12 @@ const uint32_t flash_sector[FLASH_SECTORS + 1] = {
135136
FLASH_TOP
136137
};
137138

138-
static void flash_set_waitstates(int waitstates)
139+
static void RAMFUNCTION flash_set_waitstates(int waitstates)
139140
{
140141
FLASH_ACR |= waitstates | FLASH_ACR_ENABLE_DATA_CACHE | FLASH_ACR_ENABLE_INST_CACHE;
141142
}
142143

143-
static void flash_wait_complete(void)
144+
static RAMFUNCTION void flash_wait_complete(void)
144145
{
145146
while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY)
146147
;
@@ -155,7 +156,7 @@ static void mass_erase(void)
155156
}
156157
*/
157158

158-
static void flash_erase_sector(uint32_t sec)
159+
static void RAMFUNCTION flash_erase_sector(uint32_t sec)
159160
{
160161
uint32_t reg = FLASH_CR & (~(FLASH_CR_SNB_MASK << FLASH_CR_SNB_SHIFT));
161162
FLASH_CR = reg | (sec & FLASH_CR_SNB_MASK) << FLASH_CR_SNB_SHIFT;
@@ -166,12 +167,12 @@ static void flash_erase_sector(uint32_t sec)
166167
FLASH_CR &= ~(FLASH_CR_SNB_MASK << FLASH_CR_SNB_SHIFT);
167168
}
168169

169-
static void clear_errors(void)
170+
static void RAMFUNCTION clear_errors(void)
170171
{
171172
FLASH_SR |= ( FLASH_SR_PGSERR | FLASH_SR_PGPERR | FLASH_SR_PGAERR | FLASH_SR_WRPERR | FLASH_SR_OPERR | FLASH_SR_EOP );
172173
}
173174

174-
int hal_flash_write(uint32_t address, const uint8_t *data, int len)
175+
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
175176
{
176177
int i;
177178
uint32_t val;
@@ -188,20 +189,20 @@ int hal_flash_write(uint32_t address, const uint8_t *data, int len)
188189
return 0;
189190
}
190191

191-
void hal_flash_unlock(void)
192+
void RAMFUNCTION hal_flash_unlock(void)
192193
{
193194
FLASH_CR |= FLASH_CR_LOCK;
194195
FLASH_KEYR = FLASH_KEY1;
195196
FLASH_KEYR = FLASH_KEY2;
196197
}
197198

198-
void hal_flash_lock(void)
199+
void RAMFUNCTION hal_flash_lock(void)
199200
{
200201
FLASH_CR |= FLASH_CR_LOCK;
201202
}
202203

203204

204-
int hal_flash_erase(uint32_t address, int len)
205+
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
205206
{
206207
int start = -1, end = -1;
207208
uint32_t end_address;

0 commit comments

Comments
 (0)