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| 1 | +/* spi_drv_stm32.h |
| 2 | + * |
| 3 | + * wolfBoot is free software; you can redistribute it and/or modify |
| 4 | + * it under the terms of the GNU General Public License as published by |
| 5 | + * the Free Software Foundation; either version 2 of the License, or |
| 6 | + * (at your option) any later version. |
| 7 | + * |
| 8 | + * wolfBoot is distributed in the hope that it will be useful, |
| 9 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | + * GNU General Public License for more details. |
| 12 | + * |
| 13 | + * You should have received a copy of the GNU General Public License |
| 14 | + * along with this program; if not, write to the Free Software |
| 15 | + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA |
| 16 | + */ |
| 17 | + |
1 | 18 | #ifndef SPI_DRV_STM32_H_INCLUDED |
2 | 19 | #define SPI_DRV_STM32_H_INCLUDED |
3 | 20 | #include <stdint.h> |
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13 | 30 | #define CEN_GPIOE (1 << 4) |
14 | 31 |
|
15 | 32 | #ifdef PLATFORM_stm32f4 |
16 | | -#define APB2_CLOCK_ER (*(volatile uint32_t *)(0x40023844)) |
17 | | -#define APB2_CLOCK_RST (*(volatile uint32_t *)(0x40023824)) |
18 | | -#define CLOCK_SPEED (168000000) |
| 33 | +#define APB2_CLOCK_ER (*(volatile uint32_t *)(0x40023844)) |
| 34 | +#define APB2_CLOCK_RST (*(volatile uint32_t *)(0x40023824)) |
19 | 35 | #define RCC_GPIO_CLOCK_ER (*(volatile uint32_t *)(0x40023830)) |
20 | 36 | #define GPIOA_BASE (0x40020000) |
21 | 37 | #define GPIOB_BASE (0x40020400) |
22 | 38 | #define GPIOC_BASE (0x40020800) |
23 | 39 | #define GPIOD_BASE (0x40020C00) |
24 | 40 | #define GPIOE_BASE (0x40021000) |
25 | | -#define SPI_GPIO GPIOB_BASE |
| 41 | +#define SPI_GPIO GPIOB_BASE |
26 | 42 | #define SPI_CS_GPIO GPIOE_BASE |
27 | 43 | #define SPI_CS_FLASH 1 /* Flash CS connected to GPIOE1 */ |
28 | 44 | #define SPI_CS_TPM 0 /* TPM CS connected to GPIOE0 */ |
|
33 | 49 | #endif |
34 | 50 |
|
35 | 51 | #ifdef PLATFORM_stm32wb |
36 | | -#define APB2_CLOCK_ER (*(volatile uint32_t *)(0x58000060)) |
37 | | -#define APB2_CLOCK_RST (*(volatile uint32_t *)(0x58000040)) |
38 | | -#define SPI_GPIO GPIOA_BASE |
| 52 | +#define APB2_CLOCK_ER (*(volatile uint32_t *)(0x58000060)) |
| 53 | +#define APB2_CLOCK_RST (*(volatile uint32_t *)(0x58000040)) |
39 | 54 | #define RCC_GPIO_CLOCK_ER (*(volatile uint32_t *)(0x5800004C)) |
40 | 55 | #define GPIOA_BASE (0x48000000) |
41 | 56 | #define GPIOB_BASE (0x48000400) |
42 | 57 | #define GPIOC_BASE (0x48000800) |
43 | 58 | #define GPIOD_BASE (0x48000C00) |
44 | 59 |
|
45 | 60 | /* STM32WB55 NUCLEO: CN9: D13=SCK, D12=MISO, D11=MOSI, FLASHCS=D10, TPMCS=D9 */ |
| 61 | +#define SPI_GPIO GPIOA_BASE |
46 | 62 | #define SPI_CS_GPIO GPIOA_BASE |
47 | 63 | #define SPI_CS_FLASH 4 /* Flash CS connected to GPIOA4 */ |
48 | 64 | #define SPI_CS_TPM 9 /* TPM CS connected to GPIOA9 */ |
|
52 | 68 | #define SPI1_MOSI_PIN 7 /* SPI_MOSI PA7 */ |
53 | 69 | #endif |
54 | 70 |
|
55 | | -#define SPI_PIO_BASE SPI_GPIO |
| 71 | +#define SPI_PIO_BASE SPI_GPIO |
56 | 72 | #define SPI_CS_PIO_BASE SPI_CS_GPIO |
57 | 73 |
|
58 | 74 | #if (SPI_GPIO == GPIOA_BASE) |
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