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[hifive1] fixed hal_flash_write
1 parent e08d282 commit 9cc558b

1 file changed

Lines changed: 10 additions & 15 deletions

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hal/hifive1.c

Lines changed: 10 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -177,7 +177,7 @@
177177
#define CPU_FREQ 320000000
178178
#endif
179179
#define MAX_CPU_FREQ 320000000
180-
#define MAX_FLASH_FREQ 5000000
180+
#define MAX_FLASH_FREQ 2000000
181181

182182
/* PLL Configuration */
183183
/* R and Q are fixed values for this PLL code */
@@ -279,14 +279,14 @@ static RAMFUNCTION void fespi_hwmode(void)
279279

280280
static RAMFUNCTION void fespi_csmode_hold(void)
281281
{
282-
FESPI_REG_CSMODE & ~FESPI_CSMODE_MASK;
283-
FESPI_REG_CSMODE |= FESPI_CSMODE_HOLD;
282+
uint32_t reg = FESPI_REG_CSMODE & ~FESPI_CSMODE_MASK;
283+
FESPI_REG_CSMODE = reg | FESPI_CSMODE_HOLD;
284284
}
285285

286286
static RAMFUNCTION void fespi_csmode_auto(void)
287287
{
288-
FESPI_REG_CSMODE & ~FESPI_CSMODE_MASK;
289-
FESPI_REG_CSMODE |= FESPI_CSMODE_AUTO;
288+
uint32_t reg = FESPI_REG_CSMODE & ~FESPI_CSMODE_MASK;
289+
FESPI_REG_CSMODE = reg | FESPI_CSMODE_AUTO;
290290
}
291291

292292
static RAMFUNCTION void fespi_wait_txwm(void)
@@ -376,7 +376,6 @@ static RAMFUNCTION void fespi_wait_flash_busy(void)
376376
fespi_sw_setdir(FESPI_DIR_RX);
377377
fespi_csmode_hold();
378378
fespi_sw_tx(FESPI_READ_STATUS);
379-
rx = fespi_sw_rx();
380379
while (1) {
381380
fespi_sw_tx(0);
382381
rx = fespi_sw_rx();
@@ -446,9 +445,6 @@ void hifive1_init(uint32_t cpu_clock, uint32_t uart_baud)
446445
/* Reconfigure the SPI to maximum frequency */
447446
fespi_init(cpu_clock, MAX_FLASH_FREQ);
448447

449-
/* Probe the FESPI flash */
450-
(void)fespi_flash_probe();
451-
452448
/* Reconfigure the UART */
453449
uart_init(cpu_clock, uart_baud);
454450
}
@@ -469,26 +465,24 @@ void hal_prepare_boot(void)
469465
/* Flash functions must be relocated to RAM for execution */
470466
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
471467
{
472-
int i;
468+
int i, j = 0;
473469
uint32_t off = address & 0xFF;
474470
uint32_t page = address >> 8;
475471
FESPI_REG_TXMARK = 1;
476472
fespi_swmode();
477473
fespi_wait_flash_busy();
478474

479-
while ((page * FLASH_PAGE_SIZE) < (address + len)) {
475+
while (j < len) {
480476
fespi_write_enable();
481477
fespi_csmode_hold();
482478
fespi_sw_tx(FESPI_PAGE_PROGRAM);
483479
fespi_wait_txwm();
484480
fespi_write_address((page << 8) + off);
485481
for(i = off; i < FLASH_PAGE_SIZE; i++) {
486-
fespi_sw_tx(data[i]);
482+
fespi_sw_tx(data[j++]);
487483
}
488484
fespi_csmode_auto();
489-
fespi_wait_write_disabled();
490485
page++;
491-
data += FLASH_PAGE_SIZE;
492486
off = 0;
493487
}
494488
fespi_hwmode();
@@ -532,8 +526,9 @@ int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
532526
uint32_t end = address + len - 1;
533527
uint32_t p;
534528

535-
fespi_wait_txwm();
529+
536530
FESPI_REG_TXMARK = 1;
531+
fespi_wait_txwm();
537532
fespi_swmode();
538533
fespi_wait_flash_busy();
539534

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