5858#define FESPI_TXDATA_FIFO_FULL (1 << 31)
5959#define FESPI_FMT_DIR_TX (1 << 3)
6060
61- #define FESPI_CSMODE_AUTO 0
62- #define FESPI_CSMODE_HOLD 2
63- #define FESPI_CSMODE_OFF 3
61+ #define FESPI_CSMODE_AUTO 0x0UL
62+ #define FESPI_CSMODE_HOLD 0x2UL
63+ #define FESPI_CSMODE_MASK 0x3UL
64+
65+ #define FESPI_FCTRL_MODE_SEL 0x1UL
6466
6567#define FESPI_FFMT_CMD_EN 0x1
6668#define FESPI_FFMT_ADDR_LEN (x ) (((x) & 0x7) << 1)
8486#define FESPI_PROTO_D 1 /* Dual */
8587#define FESPI_PROTO_Q 2 /* Quad */
8688
87-
89+ //#define SPI_QUAD_MODE
8890/* SPI Flash Commands */
8991#define FESPI_READ_ID 0x9F /* Read Flash Identification */
9092#define FESPI_READ_MID 0xAF /* Read Flash Identification, multi-io */
9395#define FESPI_PAGE_PROGRAM 0x02 /* Page Program */
9496#define FESPI_FAST_READ 0x0B /* Fast Read */
9597#define FESPI_READ 0x03 /* Normal Read */
98+ #ifdef SPI_QUAD_MODE
9699#define FESPI_ERASE_SECTOR 0x20 /* Sector Erase */
100+ #else
101+ #define FESPI_ERASE_SECTOR 0xD7 /* Sector Erase */
102+ #endif
97103
98104/* SPI flash status fields (from FESPI_READ_STATUS command) */
99105#define FESPI_RX_BSY (1 << 0)
@@ -258,41 +264,42 @@ void fespi_init(uint32_t cpu_clock, uint32_t flash_freq)
258264 FESPI_REG_SCKDIV |= FESPI_SCKDIV_VAL (cpu_clock , flash_freq );
259265}
260266
261- static inline void fespi_swmode (void )
267+ static RAMFUNCTION void fespi_swmode (void )
262268{
263- if (FESPI_REG_FCTRL & 1 )
264- FESPI_REG_FCTRL &= ~1UL ;
269+ if (FESPI_REG_FCTRL & FESPI_FCTRL_MODE_SEL )
270+ FESPI_REG_FCTRL &= ~FESPI_FCTRL_MODE_SEL ;
265271}
266272
267- static inline void fespi_hwmode (void )
273+ static RAMFUNCTION void fespi_hwmode (void )
268274{
269- if ((FESPI_REG_FCTRL & 1 ) == 0 )
270- FESPI_REG_FCTRL |= 1 ;
275+ if ((FESPI_REG_FCTRL & FESPI_FCTRL_MODE_SEL ) == 0 )
276+ FESPI_REG_FCTRL |= FESPI_FCTRL_MODE_SEL ;
271277}
272278
273- static inline void fespi_csmode_hold (void )
279+ static RAMFUNCTION void fespi_csmode_hold (void )
274280{
275- uint32_t reg = FESPI_REG_CSMODE & (~ 0x03 ) ;
276- FESPI_REG_CSMODE = reg | FESPI_CSMODE_HOLD ;
281+ FESPI_REG_CSMODE & ~ FESPI_CSMODE_MASK ;
282+ FESPI_REG_CSMODE |= FESPI_CSMODE_HOLD ;
277283}
278284
279- static inline void fespi_csmode_auto (void )
285+ static RAMFUNCTION void fespi_csmode_auto (void )
280286{
281- FESPI_REG_CSMODE &= (~0x03 );
287+ FESPI_REG_CSMODE & ~FESPI_CSMODE_MASK ;
288+ FESPI_REG_CSMODE |= FESPI_CSMODE_AUTO ;
282289}
283290
284- static inline void fespi_wait_txwm (void )
291+ static RAMFUNCTION void fespi_wait_txwm (void )
285292{
286293 while ((FESPI_REG_IP & FESPI_IP_TXWM ) == 0 );
287294}
288295
289- static inline void fespi_sw_tx (uint8_t b )
296+ static RAMFUNCTION void fespi_sw_tx (uint8_t b )
290297{
291298 while ((FESPI_REG_TXDATA & FESPI_TXDATA_FIFO_FULL ) != 0 );
292299 FESPI_REG_TXDATA = b ;
293300}
294301
295- static inline uint8_t fespi_sw_rx (void )
302+ static RAMFUNCTION uint8_t fespi_sw_rx (void )
296303{
297304 volatile uint32_t reg ;
298305 do {
@@ -301,22 +308,22 @@ static inline uint8_t fespi_sw_rx(void)
301308 return (uint8_t )(reg & 0xFF );
302309}
303310
304- static inline void fespi_sw_setdir (int tx )
311+ static RAMFUNCTION void fespi_sw_setdir (int tx )
305312{
306313 if (tx )
307314 FESPI_REG_FMT |= FESPI_FMT_DIR_TX ;
308315 else
309316 FESPI_REG_FMT &= ~FESPI_FMT_DIR_TX ;
310317}
311318
312- static inline void fespi_write_address (uint32_t address )
319+ static RAMFUNCTION void fespi_write_address (uint32_t address )
313320{
314321 fespi_sw_tx ((address & 0xFF0000 ) >> 16 );
315322 fespi_sw_tx ((address & 0xFF00 ) >> 8 );
316323 fespi_sw_tx ((address & 0xFF ));
317324}
318325
319- static inline void fespi_wait_flash_busy (void )
326+ static RAMFUNCTION void fespi_wait_flash_busy (void )
320327{
321328 uint8_t rx ;
322329 fespi_sw_setdir (FESPI_DIR_RX );
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