@@ -32,21 +32,24 @@ PKA_HandleTypeDef hpka = { };
3232#define DMB () __asm__ volatile ("dmb")
3333
3434/*** RCC ***/
35-
35+ #ifndef RCC_BASE
3636#define RCC_BASE (0x58000000)
37+ #endif
3738#define RCC_CR (*(volatile uint32_t *)(RCC_BASE + 0x00))
3839#define RCC_CFGR (*(volatile uint32_t *)(RCC_BASE + 0x08))
3940#define RCC_PLLCFGR (*(volatile uint32_t *)(RCC_BASE + 0x0C))
4041
42+ #ifndef WOLFSSL_STM32_PKA
4143#define RCC_CR_PLLRDY (1 << 25)
4244#define RCC_CR_PLLON (1 << 24)
43- #define RCC_CR_MSIRDY (1 << 1)
44- #define RCC_CR_MSION (1 << 0)
45- #define RCC_CR_HSIRDY (1 << 10)
46- #define RCC_CR_HSION (1 << 8)
47- #define RCC_CR_MSIRANGE_SHIFT 4
48- #define RCC_CR_MSIRANGE_MASK (0x0F << 4)
49- #define RCC_CR_MSIRANGE_6 (0x06 << 4)
45+ #define RCC_CR_MSIRDY (1 << 1)
46+ #define RCC_CR_MSION (1 << 0)
47+ #define RCC_CR_HSIRDY (1 << 10)
48+ #define RCC_CR_HSION (1 << 8)
49+ #define RCC_CR_MSIRANGE_SHIFT 4
50+ #define RCC_CR_MSIRANGE_6 (0x06 << 4)
51+ #define RCC_CR_MSIRANGE_Msk (0x0F << 4)
52+ #endif /* !WOLFSSL_STM32_PKA */
5053
5154#define RCC_CFGR_SW_MSI 0x0
5255#define RCC_CFGR_SW_PLL 0x3
@@ -78,9 +81,10 @@ PKA_HandleTypeDef hpka = { };
7881
7982#define RCC_PRESCALER_DIV_NONE 0
8083
81-
8284/*** FLASH ***/
85+ #ifndef FLASH_BASE
8386#define FLASH_BASE (0x58004000)
87+ #endif
8488#define FLASH_ACR (*(volatile uint32_t *)(FLASH_BASE + 0x00))
8589#define FLASH_KEY (*(volatile uint32_t *)(FLASH_BASE + 0x08))
8690#define FLASH_SR (*(volatile uint32_t *)(FLASH_BASE + 0x10))
@@ -92,6 +96,7 @@ PKA_HandleTypeDef hpka = { };
9296/* Register values */
9397#define FLASH_ACR_LATENCY_MASK (0x07)
9498
99+ #ifndef WOLFSSL_STM32_PKA
95100#define FLASH_SR_BSY (1 << 16)
96101#define FLASH_SR_SIZERR (1 << 6)
97102#define FLASH_SR_PGAERR (1 << 5)
@@ -105,6 +110,8 @@ PKA_HandleTypeDef hpka = { };
105110#define FLASH_CR_PER (1 << 1)
106111#define FLASH_CR_PG (1 << 0)
107112
113+ #endif /* !WOLFSSL_STM32_PKA */
114+
108115#define FLASH_CR_PNB_SHIFT 3
109116#define FLASH_CR_PNB_MASK 0x3f
110117
@@ -238,7 +245,7 @@ static void clock_pll_on(void)
238245 flash_set_waitstates (flash_waitstates );
239246
240247 /* Configure + enable internal high-speed oscillator. */
241- RCC_CR = (RCC_CR & (~RCC_CR_MSIRANGE_MASK )) | RCC_CR_MSIRANGE_6 ;
248+ RCC_CR = (RCC_CR & (~RCC_CR_MSIRANGE_Msk )) | RCC_CR_MSIRANGE_6 ;
242249 RCC_CR |= RCC_CR_MSION ;
243250 DMB ();
244251 while ((RCC_CR & RCC_CR_MSIRDY ) == 0 )
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