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danielinuxdgarske
authored andcommitted
Psoc6: fixes for correct device bring-up
1 parent 3db37a6 commit 6dcbc35

6 files changed

Lines changed: 461 additions & 14 deletions

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.gdbinit

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
tar rem:3333
22
file wolfboot.elf
33
foc c
4+
mon psoc6 reset_halt
45

arch.mk

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -153,6 +153,7 @@ endif
153153

154154
ifeq ($(TARGET),psoc6)
155155
CORTEX_M0=1
156+
OBJS+=hal/psoc6_02_cm0plus.o
156157
PKA_EXTRA_OBJS+= $(CYPRESS_PDL)/drivers/source/cy_flash.o \
157158
$(CYPRESS_PDL)/drivers/source/cy_ipc_pipe.o \
158159
$(CYPRESS_PDL)/drivers/source/cy_ipc_sema.o \

hal/psoc6.c

Lines changed: 24 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@
2121

2222
#include <stdint.h>
2323
#include <target.h>
24+
#include <string.h>
2425
#include "image.h"
2526

2627
#include "cy_device_headers.h"
@@ -31,9 +32,12 @@
3132
#include "cy_syslib.h"
3233
#include "cy_ipc_drv.h"
3334

34-
#define ROW_SIZE (0x200)
35+
#define ROW_SIZE (0x1000)
36+
#define FLASH_BASE_ADDRESS (0x10000000)
3537
#define CPU_FREQ (100000000)
3638

39+
uint8_t psoc6_write_buffer[ROW_SIZE];
40+
3741
#ifndef NVM_FLASH_WRITEONCE
3842
# error "wolfBoot psoc6 HAL: no WRITEONCE support detected. Please define NVM_FLASH_WRITEONCE"
3943
#endif
@@ -67,10 +71,9 @@ static const cy_stc_pll_manual_config_t srss_0_clock_0_pll_0_pllConfig =
6771
.outputMode = CY_SYSCLK_FLLPLL_OUTPUT_AUTO,
6872
};
6973

70-
void hal_init(void)
74+
#define MPU_CTL *((volatile uint32_t *)(0xE000ED90))
75+
static void hal_set_pll(void)
7176
{
72-
SystemInit();
73-
#if 0
7477
/*Set clock path 1 source to IMO, this feeds PLL1*/
7578
Cy_SysClk_ClkPathSetSource(1U, CY_SYSCLK_CLKPATH_IN_IMO);
7679

@@ -97,8 +100,15 @@ void hal_init(void)
97100
while(1)
98101
;
99102
}
100-
#endif
103+
}
104+
105+
void hal_init(void)
106+
{
107+
MPU_CTL = 0;
108+
//SystemInit();
109+
Cy_PDL_Init(CY_DEVICE_CFG);
101110
Cy_Flash_Init();
111+
//hal_set_pll();
102112
}
103113

104114
void hal_prepare_boot(void)
@@ -114,10 +124,18 @@ void hal_prepare_boot(void)
114124
*/
115125
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
116126
{
127+
const uint8_t *src = data;
117128
if (len < NVM_CACHE_SIZE)
118129
return -1;
130+
if ((((uint32_t)data) & FLASH_BASE_ADDRESS) == FLASH_BASE_ADDRESS) {
131+
if (len != ROW_SIZE) {
132+
return -1;
133+
}
134+
memcpy(psoc6_write_buffer, data, len);
135+
src = psoc6_write_buffer;
136+
}
119137
while (len) {
120-
Cy_Flash_WriteRow(address, (const uint32_t *) data);
138+
Cy_Flash_ProgramRow(address, (const uint32_t *) src);
121139
len -= NVM_CACHE_SIZE;
122140
if ((len > 0) && (len < NVM_CACHE_SIZE))
123141
return -1;

hal/psoc6.ld

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,13 +12,15 @@ SECTIONS
1212
_start_text = .;
1313
__Vectors = .;
1414
KEEP(*(.isr_vector))
15+
KEEP(*(.vectors))
1516
. = ALIGN(0x400);
1617
*(.text*)
1718
*(.rodata*)
1819
*(.init*)
1920
*(.fini*)
2021
. = ALIGN(4);
2122
_end_text = .;
23+
__etext = .;
2224
} > FLASH
2325

2426
.edidx :
@@ -32,25 +34,63 @@ SECTIONS
3234
.data : AT (_stored_data)
3335
{
3436
_start_data = .;
37+
__data_start__ = .;
38+
3539
KEEP(*(.data*))
3640
. = ALIGN(4);
41+
KEEP(*(.ramcode))
42+
. = ALIGN(4);
43+
/* preinit data */
44+
PROVIDE_HIDDEN (__preinit_array_start = .);
45+
KEEP(*(.preinit_array))
46+
PROVIDE_HIDDEN (__preinit_array_end = .);
47+
48+
. = ALIGN(4);
49+
/* init data */
50+
PROVIDE_HIDDEN (__init_array_start = .);
51+
KEEP(*(SORT(.init_array.*)))
52+
KEEP(*(.init_array))
53+
PROVIDE_HIDDEN (__init_array_end = .);
54+
55+
. = ALIGN(4);
56+
/* finit data */
57+
PROVIDE_HIDDEN (__fini_array_start = .);
58+
KEEP(*(SORT(.fini_array.*)))
59+
KEEP(*(.fini_array))
60+
PROVIDE_HIDDEN (__fini_array_end = .);
61+
62+
KEEP(*(.jcr*))
63+
. = ALIGN(4);
64+
65+
KEEP(*(.cy_ramfunc*))
66+
. = ALIGN(4);
67+
3768
_end_data = .;
69+
__data_end__ = .;
70+
3871
} > RAM
3972

4073
.bss (NOLOAD) :
4174
{
4275
_start_bss = .;
4376
__bss_start__ = .;
77+
__zero_table_start__ = .;
4478
*(.bss*)
4579
*(COMMON)
4680
. = ALIGN(4);
4781
_end_bss = .;
4882
__bss_end__ = .;
83+
__zero_table_end__ = .;
4984
_end = .;
85+
. = ALIGN(0x100);
5086
__ramVectors = .;
5187
} > RAM
5288
. = ALIGN(4);
5389
}
5490

5591
END_STACK = ORIGIN(RAM) + LENGTH(RAM);
5692

93+
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
94+
__StackLimit = __StackTop - 0x4000;
95+
PROVIDE(__stack = __StackTop);
96+

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