2828
2929#define PLL_SRC_HSE 1
3030
31+ #if TZ_SECURE ()
32+ static int is_flash_nonsecure (uint32_t address )
33+ {
34+ uint32_t in_bank_offset = address & 0x000FFFFF ;
35+ #ifdef DUALBANK_SWAP
36+ if (in_bank_offset >= (WOLFBOOT_PARTITION_BOOT_ADDRESS - FLASHMEM_ADDRESS_SPACE ))
37+ return 1 ;
38+ else
39+ return 0 ;
40+ #else
41+ if (address >= WOLFBOOT_PARTITION_BOOT_ADDRESS )
42+ return 1 ;
43+ else
44+ return 0 ;
45+ #endif
46+ }
47+ #endif
48+
49+
3150static void RAMFUNCTION flash_set_waitstates (unsigned int waitstates )
3251{
3352 uint32_t reg = FLASH_ACR ;
@@ -84,11 +103,13 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
84103 dst = (uint32_t * )address ;
85104
86105#if (TZ_SECURE ())
87- if ( ((address < FLASH_BANK2_BASE ) && (address >= WOLFBOOT_PARTITION_BOOT_ADDRESS )) ||
88- (address >= WOLFBOOT_PARTITION_UPDATE_ADDRESS ))
106+ if (is_flash_nonsecure (address )) {
89107 hal_tz_claim_nonsecure_area (address , len );
108+ }
90109 /* Convert into secure address space */
91- dst = (uint32_t * )((address & (~FLASHMEM_ADDRESS_SPACE )) | FLASH_SECURE_MMAP_BASE );
110+ if (((uint32_t )dst & 0x0F000000 ) == 0x08000000 ) {
111+ dst = (uint32_t * )((address & (~FLASHMEM_ADDRESS_SPACE )) | FLASH_SECURE_MMAP_BASE );
112+ }
92113#endif
93114
94115 while (i < len ) {
@@ -153,6 +174,7 @@ void RAMFUNCTION hal_flash_opt_lock(void)
153174}
154175
155176
177+
156178int RAMFUNCTION hal_flash_erase (uint32_t address , int len )
157179{
158180 uint32_t end_address ;
@@ -173,18 +195,25 @@ int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
173195 base = FLASHMEM_ADDRESS_SPACE ;
174196 reg = FLASH_CR & (~((FLASH_CR_PNB_MASK << FLASH_CR_PNB_SHIFT ) | FLASH_CR_BER ));
175197
176- if (p >= (FLASH_BANK2_BASE ) && (p <= (FLASH_TOP ) ))
177- {
178198#if TZ_SECURE ()
179- /* When in secure mode, skip erasing non-secure pages: will be erased upon claim */
199+ /* When in secure mode, skip erasing non-secure pages: will be erased upon claim */
200+ if (is_flash_nonsecure (address )) {
180201 return 0 ;
202+ }
181203#endif
204+ if (p >= (FLASH_BANK2_BASE ) && (p <= (FLASH_TOP ) ))
205+ {
182206 base = FLASH_BANK2_BASE ;
183207 bnksel = 1 ;
184208 } else {
185209 FLASH_CR &= ~FLASH_CR_SER ;
186210 return 0 ; /* Address out of range */
187211 }
212+
213+ /* Check for swapped banks to invert bnksel */
214+ if ((FLASH_OPTSR_CUR & FLASH_OPTSR_SWAP_BANK ) >> 31 )
215+ bnksel = !bnksel ;
216+
188217 reg |= ((((p - base ) >> 13 ) << FLASH_CR_PNB_SHIFT ) | FLASH_CR_SER | (bnksel << 31 ));
189218 FLASH_CR = reg ;
190219 DMB ();
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