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[SAMA5D3] Port for 32bit Cortex-A
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Lines changed: 468 additions & 60 deletions

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‎Makefile‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -130,6 +130,10 @@ ifeq ($(TARGET),nxp_t1024)
130130
MAIN_TARGET:=factory_wstage1.bin
131131
endif
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133+
ifeq ($(TARGET),sama5d3)
134+
MAIN_TARGET:=wolfboot.bin
135+
endif
136+
133137
ifeq ($(FLASH_OTP_KEYSTORE),1)
134138
MAIN_TARGET+=tools/keytools/otp/otp-keystore-primer.bin
135139
endif

‎arch.mk‎

Lines changed: 73 additions & 60 deletions
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,6 @@ ifeq ($(ARCH),ARM)
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CROSS_COMPILE?=arm-none-eabi-
7171
CFLAGS+=-mthumb -mlittle-endian -mthumb-interwork -DARCH_ARM
7272
LDFLAGS+=-mthumb -mlittle-endian -mthumb-interwork
73-
OBJS+=src/boot_arm.o
7473

7574
## Target specific configuration
7675
ifeq ($(TARGET),samr21)
@@ -176,88 +175,102 @@ ifeq ($(ARCH),ARM)
176175
SPI_TARGET=stm32
177176
endif
178177

179-
## Cortex-M CPU
180-
ifeq ($(CORTEX_M33),1)
181-
CFLAGS+=-mcpu=cortex-m33 -DCORTEX_M33
182-
LDFLAGS+=-mcpu=cortex-m33
183-
ifeq ($(TZEN),1)
184-
OBJS+=hal/stm32_tz.o
185-
CFLAGS+=-mcmse
186-
ifeq ($(WOLFCRYPT_TZ),1)
187-
SECURE_OBJS+=./src/wc_callable.o
188-
SECURE_OBJS+=./lib/wolfssl/wolfcrypt/src/random.o
189-
CFLAGS+=-DWOLFCRYPT_SECURE_MODE
190-
SECURE_LDFLAGS+=-Wl,--cmse-implib -Wl,--out-implib=./src/wc_secure_calls.o
191-
endif
192-
endif # TZEN=1
193-
ifeq ($(NO_ASM),1)
194-
ifeq ($(SPMATH),1)
195-
ifeq ($(NO_ASM),1)
196-
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
197-
else
198-
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
199-
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
200-
endif
201-
endif
202-
else
203-
ifeq ($(SPMATH),1)
204-
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
205-
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
206-
endif
178+
ifeq ($(TARGET),sama5d3)
179+
CORTEX_A5=1
207180
endif
181+
182+
## Cortex CPU
183+
184+
ifeq ($(CORTEX_A5),1)
185+
CFLAGS+=-mcpu=cortex-a5 -mtune=cortex-a5 -mfpu=vfpv4-d16 -static -z noexecstack
186+
LDLAGS+=-mcpu=cortex-a5 -mtune=cortex-a5 -mtune=cortex-a5 -mfpu=vfpv4-d16 -static -z noexecstack -Ttext 0x300000
187+
# Cortex-A uses boot_arm32.o
188+
OBJS+=src/boot_arm32.o src/boot_arm32_start.o
189+
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
208190
else
209-
ifeq ($(CORTEX_M7),1)
210-
CFLAGS+=-mcpu=cortex-m7
211-
LDFLAGS+=-mcpu=cortex-m7
212-
ifeq ($(SPMATH),1)
213-
ifeq ($(NO_ASM),1)
214-
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
215-
else
191+
# All others use boot_arm.o
192+
OBJS+=src/boot_arm.o
193+
ifeq ($(CORTEX_M33),1)
194+
CFLAGS+=-mcpu=cortex-m33 -DCORTEX_M33
195+
LDFLAGS+=-mcpu=cortex-m33
196+
ifeq ($(TZEN),1)
197+
OBJS+=hal/stm32_tz.o
198+
CFLAGS+=-mcmse
199+
ifeq ($(WOLFCRYPT_TZ),1)
200+
SECURE_OBJS+=./src/wc_callable.o
201+
SECURE_OBJS+=./lib/wolfssl/wolfcrypt/src/random.o
202+
CFLAGS+=-DWOLFCRYPT_SECURE_MODE
203+
SECURE_LDFLAGS+=-Wl,--cmse-implib -Wl,--out-implib=./src/wc_secure_calls.o
204+
endif
205+
endif # TZEN=1
206+
ifeq ($(NO_ASM),1)
207+
ifeq ($(SPMATH),1)
208+
ifeq ($(NO_ASM),1)
209+
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
210+
else
211+
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
212+
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
213+
endif
214+
endif
215+
else
216+
ifeq ($(SPMATH),1)
216217
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
217218
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
218219
endif
219220
endif
220221
else
221-
ifeq ($(CORTEX_M0),1)
222-
CFLAGS+=-mcpu=cortex-m0
223-
LDFLAGS+=-mcpu=cortex-m0
222+
ifeq ($(CORTEX_M7),1)
223+
CFLAGS+=-mcpu=cortex-m7
224+
LDFLAGS+=-mcpu=cortex-m7
224225
ifeq ($(SPMATH),1)
225226
ifeq ($(NO_ASM),1)
226227
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
227228
else
228-
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_THUMB_ASM
229-
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_armthumb.o
229+
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
230+
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
230231
endif
231232
endif
232233
else
233-
ifeq ($(CORTEX_M3),1)
234-
235-
CFLAGS+=-mcpu=cortex-m3
236-
LDFLAGS+=-mcpu=cortex-m3
234+
ifeq ($(CORTEX_M0),1)
235+
CFLAGS+=-mcpu=cortex-m0
236+
LDFLAGS+=-mcpu=cortex-m0
237+
ifeq ($(SPMATH),1)
238+
ifeq ($(NO_ASM),1)
239+
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
240+
else
241+
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_THUMB_ASM
242+
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_armthumb.o
243+
endif
244+
endif
245+
else
246+
ifeq ($(CORTEX_M3),1)
247+
CFLAGS+=-mcpu=cortex-m3
248+
LDFLAGS+=-mcpu=cortex-m3
249+
ifeq ($(NO_ASM),1)
250+
ifeq ($(SPMATH),1)
251+
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
252+
endif
253+
else
254+
ifeq ($(SPMATH),1)
255+
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM -DWOLFSSL_SP_NO_UMAAL
256+
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
257+
endif
258+
endif
259+
else
260+
# default Cortex M4
261+
CFLAGS+=-mcpu=cortex-m4
262+
LDFLAGS+=-mcpu=cortex-m4
237263
ifeq ($(NO_ASM),1)
238264
ifeq ($(SPMATH),1)
239265
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
240266
endif
241267
else
268+
CFLAGS+=-fomit-frame-pointer # required with debug builds only
242269
ifeq ($(SPMATH),1)
243-
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM -DWOLFSSL_SP_NO_UMAAL
270+
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
244271
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
245272
endif
246273
endif
247-
else
248-
# default Cortex M4
249-
CFLAGS+=-mcpu=cortex-m4
250-
LDFLAGS+=-mcpu=cortex-m4
251-
ifeq ($(NO_ASM),1)
252-
ifeq ($(SPMATH),1)
253-
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
254-
endif
255-
else
256-
CFLAGS+=-fomit-frame-pointer # required with debug builds only
257-
ifeq ($(SPMATH),1)
258-
CFLAGS+=-DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM
259-
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o
260-
endif
261274
endif
262275
endif
263276
endif

‎docs/Targets.md‎

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@@ -8,6 +8,7 @@ This README describes configuration of supported targets.
88
* [Cypress PSoC-6](#cypress-psoc-6)
99
* [Infineon AURIX TC3xx](#infineon-aurix-tc3xx)
1010
* [Intel x86-64 Intel FSP](#intel-x86_64-with-intel-fsp-support)
11+
* [Microchip SAMA5D3](#microchip-sama5d3)
1112
* [Microchip SAME51](#microchip-same51)
1213
* [NXP Kinetis](#nxp-kinetis)
1314
* [NXP LPC54xxx](#nxp-lpc54xxx)
@@ -1405,6 +1406,51 @@ the monitor command sequence below:
14051406
(gdb) mon psoc6 reset_halt
14061407
```
14071408

1409+
1410+
## Microchip SAMA5D3
1411+
1412+
SAMA5D3 is a Cortex-A5 Microprocessor. The ATSAMA5D3-XPLAINED is the evaluation
1413+
board used for wolfBoot port, which also equips a 2MB NAND flash. WolfBoot
1414+
replaces the default first stage bootloader (at91bootstrap).
1415+
1416+
### Building wolfBoot
1417+
1418+
An example configuration file is provided.
1419+
1420+
`cp config/examples/sama5d3.config .config`
1421+
1422+
Run make to build wolfBoot.bin and the test application
1423+
1424+
`make`
1425+
1426+
### Programming wolfboot.bin into NAND flash
1427+
1428+
To flash any firmware image into the device NVMs, you need the tool `sam-ba`,
1429+
distributed by Microchip.
1430+
1431+
This procedure has been tested using sam-ba v.3.8 using ATSAMA5D3-XPLAINED board,
1432+
with JP6 (aka the `SPI_CS` jumper) removed, so the system boots from NAND by
1433+
default.
1434+
1435+
Step 1: install the tool, connect a J-Link device to the J24 JTAG connector then run the
1436+
following command to activate "lowlevel" mode:
1437+
1438+
`sam-ba -p j-link -b sama5d3-xplained -t 5 -a lowlevel`
1439+
1440+
Step 2: erase the entire NAND flash:
1441+
1442+
`sam-ba -p j-link -b sama5d3-xplained -t 5 -a nandflash -c erase`
1443+
1444+
Step 3: program `wolfboot.bin` to the beginning of the flash:
1445+
1446+
`sam-ba -p j-link -b sama5d3-xplained -t 5 -a nandflash -c writeboot:wolfboot.bin`
1447+
1448+
### Programming the test application into NAND flash
1449+
1450+
(TODO)
1451+
1452+
1453+
14081454
## Microchip SAME51
14091455

14101456
SAME51 is a Cortex-M4 microcontroller with a dual-bank, 1MB flash memory divided

‎hal/sama5d3.c‎

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@@ -0,0 +1,94 @@
1+
/* atsama5d3.c
2+
*
3+
* Copyright (C) 2024 wolfSSL Inc.
4+
*
5+
* This file is part of wolfBoot.
6+
*
7+
* wolfBoot is free software; you can redistribute it and/or modify
8+
* it under the terms of the GNU General Public License as published by
9+
* the Free Software Foundation; either version 3 of the License, or
10+
* (at your option) any later version.
11+
*
12+
* wolfBoot is distributed in the hope that it will be useful,
13+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
14+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15+
* GNU General Public License for more details.
16+
*
17+
* You should have received a copy of the GNU General Public License
18+
* along with this program; if not, write to the Free Software
19+
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
20+
*/
21+
22+
#include <stdint.h>
23+
#include <string.h>
24+
#include <target.h>
25+
#include "image.h"
26+
#ifndef ARCH_ARM
27+
# error "wolfBoot atsama5d3 HAL: wrong architecture selected. Please compile with ARCH=ARM."
28+
#endif
29+
30+
#define TEST_ENCRYPT
31+
32+
/* Fixed addresses */
33+
extern void *kernel_addr, *update_addr, *dts_addr;
34+
35+
void* hal_get_primary_address(void)
36+
{
37+
return (void*)&kernel_addr;
38+
}
39+
40+
void* hal_get_update_address(void)
41+
{
42+
return (void*)&update_addr;
43+
}
44+
45+
void* hal_get_dts_address(void)
46+
{
47+
return (void*)&dts_addr;
48+
}
49+
50+
void* hal_get_dts_update_address(void)
51+
{
52+
return NULL; /* Not yet supported */
53+
}
54+
55+
/* QSPI functions */
56+
void qspi_init(uint32_t cpu_clock, uint32_t flash_freq)
57+
{
58+
}
59+
60+
61+
void zynq_init(uint32_t cpu_clock)
62+
{
63+
}
64+
65+
66+
67+
/* public HAL functions */
68+
void hal_init(void)
69+
{
70+
}
71+
72+
void hal_prepare_boot(void)
73+
{
74+
}
75+
76+
77+
int RAMFUNCTION hal_flash_write(uintptr_t address, const uint8_t *data, int len)
78+
{
79+
return 0;
80+
}
81+
82+
void RAMFUNCTION hal_flash_unlock(void)
83+
{
84+
}
85+
86+
void RAMFUNCTION hal_flash_lock(void)
87+
{
88+
}
89+
90+
91+
int RAMFUNCTION hal_flash_erase(uintptr_t address, int len)
92+
{
93+
return 0;
94+
}

‎hal/sama5d3.ld‎

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1+
OUTPUT_FORMAT("elf32-littlearm")
2+
OUTPUT_ARCH(arm)
3+
4+
MEMORY
5+
{
6+
DDR_MEM(rwx): ORIGIN = 0x00300000, LENGTH = 0x000100000
7+
}
8+
9+
ENTRY(reset_vector_entry)
10+
SECTIONS
11+
{
12+
.text : {
13+
_start_text = .;
14+
*(.text)
15+
*(.rodata)
16+
*(.rodata*)
17+
. = ALIGN(4);
18+
*(.glue_7)
19+
. = ALIGN(4);
20+
*(.eh_frame)
21+
. = ALIGN(4);
22+
_end_text = . ;
23+
}
24+
25+
/* collect all initialized .data sections */
26+
/* .data : AT ( ADDR (.text) + SIZEOF (.text) SIZEOF (.ARM.*) { */
27+
28+
. = ALIGN(4);
29+
.dummy : {
30+
_edummy = .;
31+
}
32+
33+
.data : AT (LOADADDR(.dummy)) {
34+
_start_data = .;
35+
*(.vectors)
36+
*(.data)
37+
_end_data = .;
38+
}
39+
40+
/* collect all uninitialized .bss sections */
41+
.bss (NOLOAD) : {
42+
. = ALIGN(4);
43+
_start_bss = .;
44+
*(.bss)
45+
_end_bss = .;
46+
}
47+
}
48+
_romsize = _end_data - _start_text;
49+
_sramsize = _end_bss - _start_text;
50+
END_STACK = _start_text;
51+
_stack_top = ORIGIN(DDR_MEM) + LENGTH(DDR_MEM);
52+
end = .; /* define a global symbol marking the end of application */
53+

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