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Fix for Zynqmp tap delay and non EL-3 use of cpufreq.
1 parent 94af71e commit 1d2a3ab

1 file changed

Lines changed: 4 additions & 2 deletions

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hal/zynq.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -156,7 +156,7 @@
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/* IOP System-level Control */
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#define IOU_SLCR_BASSE 0xFF180000
159-
#define IOU_TAPDLY_BYPASS (*((volatile uint32_t*)(IOU_SLCR_BASSE + 390)))
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#define IOU_TAPDLY_BYPASS (*((volatile uint32_t*)(IOU_SLCR_BASSE + 0x390)))
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#define IOU_TAPDLY_BYPASS_LQSPI_RX (1UL << 2) /* LQSPI Tap Delay Enable on Rx Clock signal. 0: enable. 1: disable (bypass tap delay). */
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@@ -759,6 +759,7 @@ void qspi_init(uint32_t cpu_clock, uint32_t flash_freq)
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GQSPI_CFG = reg_cfg;
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/* use tap delay bypass < 40MHz SPI clock */
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IOU_TAPDLY_BYPASS |= IOU_TAPDLY_BYPASS_LQSPI_RX;
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GQSPI_LPBK_DLY_ADJ = 0;
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QSPI_DATA_DLY_ADJ = 0;
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@@ -888,7 +889,8 @@ void hal_init(void)
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printf("\nwolfBoot Secure Boot\n");
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#endif
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asm volatile("msr cntfrq_el0, %0" : : "r" (cpu_freq) : "memory");
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/* This is only allowed for EL-3 */
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//asm volatile("msr cntfrq_el0, %0" : : "r" (cpu_freq) : "memory");
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zynq_init(cpu_freq);
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}

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