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Added NO_QNX option to force not using QNX driver (when using QNX compiler).
1 parent 897e63b commit 1bdfb32

2 files changed

Lines changed: 13 additions & 9 deletions

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arch.mk

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,10 +32,10 @@ WOLFCRYPT_OBJS+=./lib/wolfssl/wolfcrypt/src/sha256.o
3232

3333
## ARM
3434
ifeq ($(ARCH),AARCH64)
35-
ARCH_FLASH_OFFSET=0x80000
3635
CROSS_COMPILE:=aarch64-none-elf-
3736
CFLAGS+=-DARCH_AARCH64 -march=armv8-a
3837
OBJS+=src/boot_aarch64.o src/boot_aarch64_start.o
38+
CFLAGS+=-DNO_QNX
3939
endif
4040

4141
ifeq ($(ARCH),ARM)

hal/zynq.c

Lines changed: 12 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -22,9 +22,13 @@
2222
#include <stdint.h>
2323
#include <string.h>
2424

25+
#if defined(__QNXNTO__) && !defined(NO_QNX)
26+
#define USE_QNX
27+
#endif
28+
2529
#ifdef DEBUG_ZYNQ
2630
#include <stdio.h>
27-
#ifndef __QNXNTO__
31+
#ifndef USE_QNX
2832
#include "xil_printf.h"
2933
#endif
3034
#endif
@@ -35,7 +39,7 @@
3539
# error "wolfBoot zynq HAL: wrong architecture selected. Please compile with ARCH=AARCH64."
3640
#endif
3741

38-
#ifdef __QNXNTO__
42+
#ifdef USE_QNX
3943
#include <sys/siginfo.h>
4044
#include "xzynq_gqspi.h"
4145
#endif
@@ -217,7 +221,7 @@ typedef struct QspiDev {
217221
uint32_t bus; /* GQSPI_GEN_FIFO_BUS_LOW, GQSPI_GEN_FIFO_BUS_UP or GQSPI_GEN_FIFO_BUS_BOTH */
218222
uint32_t cs; /* GQSPI_GEN_FIFO_CS_LOWER, GQSPI_GEN_FIFO_CS_UPPER */
219223
uint32_t stripe; /* OFF=0 or ON=GQSPI_GEN_FIFO_STRIPE */
220-
#ifdef __QNXNTO__
224+
#ifdef USE_QNX
221225
xzynq_qspi_t* qnx;
222226
#endif
223227
} QspiDev_t;
@@ -228,7 +232,7 @@ static QspiDev_t mDev;
228232
static int test_flash(QspiDev_t* dev);
229233
#endif
230234

231-
#ifdef __QNXNTO__
235+
#ifdef USE_QNX
232236
static int qspi_transfer(QspiDev_t* pDev,
233237
const uint8_t* cmdData, uint32_t cmdSz,
234238
const uint8_t* txData, uint32_t txSz,
@@ -554,7 +558,7 @@ static void qspi_dump_regs(void)
554558
printf("QSPIDMA_DST_CTRL2 %08x\n", QSPIDMA_DST_CTRL2);
555559
}
556560
#endif
557-
#endif /* __QNXNTO__ */
561+
#endif /* USE_QNX */
558562

559563
static int qspi_flash_read_id(QspiDev_t* dev, uint8_t* id, uint32_t idSz)
560564
{
@@ -714,7 +718,7 @@ void qspi_init(uint32_t cpu_clock, uint32_t flash_freq)
714718

715719
memset(&mDev, 0, sizeof(mDev));
716720

717-
#ifdef __QNXNTO__
721+
#ifdef USE_QNX
718722
mDev.qnx = xzynq_qspi_open();
719723
if (mDev.qnx == NULL) {
720724
#ifdef DEBUG_ZYNQ
@@ -772,7 +776,7 @@ void qspi_init(uint32_t cpu_clock, uint32_t flash_freq)
772776
GQSPI_IER = GQSPI_IXR_ALL_MASK;
773777

774778
GQSPI_EN = 1; /* Enable Device */
775-
#endif /* __QNXNTO__ */
779+
#endif /* USE_QNX */
776780

777781
/* Issue Flash Reset Command */
778782
//qspi_flash_reset(&mDev);
@@ -864,7 +868,7 @@ void zynq_exit(void)
864868
return;
865869
#endif
866870

867-
#ifdef __QNXNTO__
871+
#ifdef USE_QNX
868872
if (mDev.qnx) {
869873
xzynq_qspi_close(mDev.qnx);
870874
mDev.qnx = NULL;

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