3232
3333#ifdef PLATFORM_stm32f4
3434
35- extern int update_started ;
3635
37- #define UART3 (0x40004800 )
36+ #define UART1 (0x40011000 )
3837
39- #define UART3_SR (*(volatile uint32_t *)(UART3 ))
40- #define UART3_DR (*(volatile uint32_t *)(UART3 + 0x04))
41- #define UART3_BRR (*(volatile uint32_t *)(UART3 + 0x08))
42- #define UART3_CR1 (*(volatile uint32_t *)(UART3 + 0x0c))
43- #define UART3_CR2 (*(volatile uint32_t *)(UART3 + 0x10))
38+ #define UART1_SR (*(volatile uint32_t *)(UART1 ))
39+ #define UART1_DR (*(volatile uint32_t *)(UART1 + 0x04))
40+ #define UART1_BRR (*(volatile uint32_t *)(UART1 + 0x08))
41+ #define UART1_CR1 (*(volatile uint32_t *)(UART1 + 0x0c))
42+ #define UART1_CR2 (*(volatile uint32_t *)(UART1 + 0x10))
4443
4544#define UART_CR1_UART_ENABLE (1 << 13)
4645#define UART_CR1_SYMBOL_LEN (1 << 12)
@@ -55,19 +54,19 @@ extern int update_started;
5554
5655#define CLOCK_SPEED (168000000)
5756
58- #define APB1_CLOCK_ER (*(volatile uint32_t *)(0x40023840 ))
59- #define UART3_APB1_CLOCK_ER_VAL (1 << 18 )
57+ #define APB2_CLOCK_ER (*(volatile uint32_t *)(0x40023844 ))
58+ #define UART1_APB2_CLOCK_ER (1 << 4 )
6059
6160#define AHB1_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
62- #define GPIOD_AHB1_CLOCK_ER (1 << 3 )
63- #define GPIOD_BASE 0x40020c00
64- #define GPIOD_MODE (*(volatile uint32_t *)(GPIOD_BASE + 0x00))
65- #define GPIOD_AFL (*(volatile uint32_t *)(GPIOD_BASE + 0x20 ))
66- #define GPIOD_AFH (*(volatile uint32_t *)(GPIOD_BASE + 0x24 ))
67- #define GPIO_MODE_AF (2 )
68- #define UART3_PIN_AF 7
69- #define UART3_RX_PIN 9
70- #define UART3_TX_PIN 8
61+ #define GPIOB_AHB1_CLOCK_ER (1 << 1 )
62+ #define GPIOB_BASE 0x40020400
63+
64+ #define GPIOB_MODE (*(volatile uint32_t *)(GPIOB_BASE + 0x00 ))
65+ #define GPIOB_AFL (*(volatile uint32_t *)(GPIOB_BASE + 0x20 ))
66+ #define GPIOB_AFH (*(volatile uint32_t *)(GPIOB_BASE + 0x24) )
67+ #define UART1_PIN_AF 7
68+ #define UART1_RX_PIN 7
69+ #define UART1_TX_PIN 6
7170
7271#define MSGSIZE 16
7372#define PAGESIZE (256)
@@ -83,26 +82,26 @@ void uart_write(const char c)
8382{
8483 uint32_t reg ;
8584 do {
86- reg = UART3_SR ;
85+ reg = UART1_SR ;
8786 } while ((reg & UART_SR_TX_EMPTY ) == 0 );
88- UART3_DR = c ;
87+ UART1_DR = c ;
8988}
9089
9190static void uart_pins_setup (void )
9291{
9392 uint32_t reg ;
94- AHB1_CLOCK_ER |= GPIOD_AHB1_CLOCK_ER ;
93+ AHB1_CLOCK_ER |= GPIOB_AHB1_CLOCK_ER ;
9594 /* Set mode = AF */
96- reg = GPIOD_MODE & ~ (0x03 << (UART3_RX_PIN * 2 ));
97- GPIOD_MODE = reg | (2 << (UART3_RX_PIN * 2 ));
98- reg = GPIOD_MODE & ~ (0x03 << (UART3_TX_PIN * 2 ));
99- GPIOD_MODE = reg | (2 << (UART3_TX_PIN * 2 ));
100-
101- /* Alternate function: use high pins (8 and 9 ) */
102- reg = GPIOD_AFH & ~(0xf << ((UART3_TX_PIN - 8 ) * 4 ));
103- GPIOD_AFH = reg | (UART3_PIN_AF << ((UART3_TX_PIN - 8 ) * 4 ));
104- reg = GPIOD_AFH & ~(0xf << ((UART3_RX_PIN - 8 ) * 4 ));
105- GPIOD_AFH = reg | (UART3_PIN_AF << ((UART3_RX_PIN - 8 ) * 4 ));
95+ reg = GPIOB_MODE & ~ (0x03 << (UART1_RX_PIN * 2 ));
96+ GPIOB_MODE = reg | (2 << (UART1_RX_PIN * 2 ));
97+ reg = GPIOB_MODE & ~ (0x03 << (UART1_TX_PIN * 2 ));
98+ GPIOB_MODE = reg | (2 << (UART1_TX_PIN * 2 ));
99+
100+ /* Alternate function: use low pins (6 and 7 ) */
101+ reg = GPIOB_AFL & ~(0xf << ((UART1_TX_PIN ) * 4 ));
102+ GPIOB_AFL = reg | (UART1_PIN_AF << ((UART1_TX_PIN ) * 4 ));
103+ reg = GPIOB_AFL & ~(0xf << ((UART1_RX_PIN ) * 4 ));
104+ GPIOB_AFL = reg | (UART1_PIN_AF << ((UART1_RX_PIN ) * 4 ));
106105}
107106
108107int uart_setup (uint32_t bitrate , uint8_t data , char parity , uint8_t stop )
@@ -111,40 +110,40 @@ int uart_setup(uint32_t bitrate, uint8_t data, char parity, uint8_t stop)
111110 /* Enable pins and configure for AF7 */
112111 uart_pins_setup ();
113112 /* Turn on the device */
114- APB1_CLOCK_ER |= UART3_APB1_CLOCK_ER_VAL ;
113+ APB2_CLOCK_ER |= UART1_APB2_CLOCK_ER ;
115114
116115 /* Configure for TX + RX */
117- UART3_CR1 |= (UART_CR1_TX_ENABLE | UART_CR1_RX_ENABLE );
116+ UART1_CR1 |= (UART_CR1_TX_ENABLE | UART_CR1_RX_ENABLE );
118117
119118 /* Configure clock */
120- UART3_BRR = CLOCK_SPEED / bitrate ;
119+ UART1_BRR = CLOCK_SPEED / bitrate ;
121120
122121 /* Configure data bits */
123122 if (data == 8 )
124- UART3_CR1 &= ~UART_CR1_SYMBOL_LEN ;
123+ UART1_CR1 &= ~UART_CR1_SYMBOL_LEN ;
125124 else
126- UART3_CR1 |= UART_CR1_SYMBOL_LEN ;
125+ UART1_CR1 |= UART_CR1_SYMBOL_LEN ;
127126
128127 /* Configure parity */
129128 switch (parity ) {
130129 case 'O' :
131- UART3_CR1 |= UART_CR1_PARITY_ODD ;
130+ UART1_CR1 |= UART_CR1_PARITY_ODD ;
132131 /* fall through to enable parity */
133132 case 'E' :
134- UART3_CR1 |= UART_CR1_PARITY_ENABLED ;
133+ UART1_CR1 |= UART_CR1_PARITY_ENABLED ;
135134 break ;
136135 default :
137- UART3_CR1 &= ~(UART_CR1_PARITY_ENABLED | UART_CR1_PARITY_ODD );
136+ UART1_CR1 &= ~(UART_CR1_PARITY_ENABLED | UART_CR1_PARITY_ODD );
138137 }
139138 /* Set stop bits */
140- reg = UART3_CR2 & ~UART_CR2_STOPBITS ;
139+ reg = UART1_CR2 & ~UART_CR2_STOPBITS ;
141140 if (stop > 1 )
142- UART3_CR2 = reg & (2 << 12 );
141+ UART1_CR2 = reg & (2 << 12 );
143142 else
144- UART3_CR2 = reg ;
143+ UART1_CR2 = reg ;
145144
146145 /* Turn on uart */
147- UART3_CR1 |= UART_CR1_UART_ENABLE ;
146+ UART1_CR1 |= UART_CR1_UART_ENABLE ;
148147
149148 return 0 ;
150149}
@@ -154,9 +153,9 @@ char uart_read(void)
154153 char c ;
155154 volatile uint32_t reg ;
156155 do {
157- reg = UART3_SR ;
156+ reg = UART1_SR ;
158157 } while ((reg & UART_SR_RX_NOTEMPTY ) == 0 );
159- c = (char )(UART3_DR & 0xff );
158+ c = (char )(UART1_DR & 0xff );
160159 return c ;
161160}
162161
@@ -209,12 +208,16 @@ void main(void) {
209208 uart_setup (115200 , 8 , 'N' , 1 );
210209 memset (page , 0xFF , PAGESIZE );
211210 asm volatile ("cpsie i" );
212- /* Initiate update */
213211
214- //wolfBoot_success();
215212
216213 hal_flash_unlock ();
214+ version = wolfBoot_current_firmware_version ();
215+ if ((version & 0x01 ) == 0 )
216+ wolfBoot_success ();
217217 uart_write (START );
218+ for (i = 3 ; i >= 0 ; i -- ) {
219+ uart_write (v_array [i ]);
220+ }
218221 while (1 ) {
219222 r_total = 0 ;
220223 do {
@@ -241,7 +244,6 @@ void main(void) {
241244 uart_write (START );
242245 recv_seq = 0 ;
243246 tot_len = 0 ;
244- update_started = 1 ;
245247 continue ;
246248 }
247249 tot_len = tlen ;
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