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danielinuxdanielinux
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ARMASM. Macros for clocks+gpios. Set MAC pins.
1 parent b97abd4 commit 07bdae6

6 files changed

Lines changed: 82 additions & 34 deletions

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‎arch.mk‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,8 @@ endif
6868

6969
ifeq ($(ARCH),ARM)
7070
CROSS_COMPILE?=arm-none-eabi-
71-
CFLAGS+=-mthumb -mlittle-endian -mthumb-interwork -DARCH_ARM
71+
CFLAGS+=-DARCH_ARM
72+
CFLAGS+=-mthumb -mlittle-endian -mthumb-interwork
7273
LDFLAGS+=-mthumb -mlittle-endian -mthumb-interwork
7374

7475
## Target specific configuration
@@ -194,7 +195,10 @@ ifeq ($(CORTEX_A5),1)
194195
MATH_OBJS+=./lib/wolfssl/wolfcrypt/src/sp_c32.o
195196
else
196197
MATH_OBJS+=./lib/wolfssl/wolfcrypt/src/sp_arm32.o
197-
CFLAGS+=-DWOLFSSL_SP_ARM32_ASM
198+
OBJS+=./lib/wolfssl/wolfcrypt/src/port/arm/armv8-sha256.o
199+
OBJS+=./lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-sha256-asm.o
200+
OBJS+=./lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-sha256-asm_c.o
201+
CFLAGS+=-DWOLFSSL_SP_ARM32_ASM -DWOLFSSL_ARMASM -DWOLFSSL_ARMASM_NO_HW_CRYPTO -DWOLFSSL_ARM_ARCH=7 -DWOLFSSL_ARMASM_INLINE -DWOLFSSL_ARMASM_NO_NEON
198202
endif
199203
else
200204
# All others use boot_arm.o

‎hal/sama5d3.c‎

Lines changed: 27 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -195,6 +195,31 @@ static void pll_init(void)
195195
master_clock_set(PRESCALER_PLLA_CLOCK);
196196
}
197197

198+
/* GMAC PINS: PB8, PB11, PB16, PB18 */
199+
/* EMAC PINS: PC7, PC8 */
200+
#define GMAC_PINS ( (1 << 8) | (1 << 11) | (1 << 16) | (1 << 18) )
201+
#define EMAC_PINS ( (1 << 7) | (1 << 8) )
202+
#define GPIO_GMAC GPIOB
203+
#define GPIO_EMAC GPIOC
204+
205+
static void mac_init(void)
206+
{
207+
PMC_CLOCK_EN(GPIOB_PMCID);
208+
PMC_CLOCK_EN(GPIOC_PMCID);
209+
210+
GPIO_PPUDR(GPIO_GMAC) = GMAC_PINS;
211+
GPIO_PPDDR(GPIO_GMAC) = GMAC_PINS;
212+
GPIO_PER(GPIO_GMAC) = GMAC_PINS;
213+
GPIO_OER(GPIO_GMAC) = GMAC_PINS;
214+
GPIO_CODR(GPIO_GMAC) = GMAC_PINS;
215+
216+
GPIO_PPUDR(GPIO_EMAC) = EMAC_PINS;
217+
GPIO_PPDDR(GPIO_EMAC) = EMAC_PINS;
218+
GPIO_PER(GPIO_EMAC) = EMAC_PINS;
219+
GPIO_OER(GPIO_EMAC) = EMAC_PINS;
220+
GPIO_CODR(GPIO_EMAC) = EMAC_PINS;
221+
}
222+
198223

199224
static void ddr_init(void)
200225
{
@@ -245,10 +270,7 @@ static void ddr_init(void)
245270
*
246271
*/
247272
/* Turn on the DDRAM controller peripheral clock */
248-
PMC_PCR = MPDDRC_PMCID;
249-
pmc_pcr = PMC_PCR & (~PMC_PCR_DIV_MASK);
250-
pmc_pcr |= PMC_PCR_CMD | PMC_PCR_EN;
251-
PMC_PCR = pmc_pcr;
273+
PMC_CLOCK_EN(MPDDRC_PMCID);
252274

253275
/* Enable DDR in system clock */
254276
PMC_SCER = MPDDRC_SCERID;
@@ -649,10 +671,7 @@ void pit_init(void)
649671
uint32_t pmc_pcr;
650672

651673
/* Turn on clock for PIT */
652-
PMC_PCR = PIT_PMCID;
653-
pmc_pcr = PMC_PCR & (~PMC_PCR_DIV_MASK);
654-
pmc_pcr |= PMC_PCR_CMD | PMC_PCR_EN;
655-
PMC_PCR = pmc_pcr;
674+
PMC_CLOCK_EN(PIT_PMCID);
656675

657676
/* Set clock source to MCK/2 */
658677
PIT_MR = MAX_PIV | PIT_MR_EN;

‎hal/sama5d3.h‎

Lines changed: 38 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -278,6 +278,14 @@
278278
#define MAX_PIV 0xfffff
279279
#define PIT_MR_EN (1 << 24)
280280

281+
/* GPIO PMC IDs */
282+
#define GPIOA_PMCID 0x06
283+
#define GPIOB_PMCID 0x07
284+
#define GPIOC_PMCID 0x08
285+
#define GPIOD_PMCID 0x09
286+
#define GPIOE_PMCID 0x0A
287+
288+
281289

282290
struct dram {
283291
struct dram_timing {
@@ -427,22 +435,36 @@ extern void *kernel_addr, *update_addr, *dts_addr;
427435
#define MAX_ECC_BYTES 8
428436
#endif
429437

430-
#define GPIOE_BASE 0xFFFFFA00
431-
432-
#define GPIOE_PER *(volatile uint32_t *)(GPIOE_BASE + 0x00)
433-
#define GPIOE_PDR *(volatile uint32_t *)(GPIOE_BASE + 0x04)
434-
#define GPIOE_PSR *(volatile uint32_t *)(GPIOE_BASE + 0x08)
435-
#define GPIOE_OER *(volatile uint32_t *)(GPIOE_BASE + 0x10)
436-
#define GPIOE_ODR *(volatile uint32_t *)(GPIOE_BASE + 0x14)
437-
#define GPIOE_OSR *(volatile uint32_t *)(GPIOE_BASE + 0x18)
438-
#define GPIOE_SODR *(volatile uint32_t *)(GPIOE_BASE + 0x30)
439-
#define GPIOE_CODR *(volatile uint32_t *)(GPIOE_BASE + 0x34)
440-
#define GPIOE_IER *(volatile uint32_t *)(GPIOE_BASE + 0x40)
441-
#define GPIOE_IDR *(volatile uint32_t *)(GPIOE_BASE + 0x44)
442-
#define GPIOE_MDER *(volatile uint32_t *)(GPIOE_BASE + 0x50)
443-
#define GPIOE_MDDR *(volatile uint32_t *)(GPIOE_BASE + 0x54)
444-
#define GPIOE_PPUDR *(volatile uint32_t *)(GPIOE_BASE + 0x60)
445-
#define GPIOE_PPUER *(volatile uint32_t *)(GPIOE_BASE + 0x64)
438+
439+
#define GPIOB 0xFFFFF400
440+
#define GPIOC 0xFFFFF600
441+
#define GPIOE 0xFFFFFA00
442+
443+
#define GPIO_PER(base) *(volatile uint32_t *)(base + 0x00)
444+
#define GPIO_PDR(base) *(volatile uint32_t *)(base + 0x04)
445+
#define GPIO_PSR(base) *(volatile uint32_t *)(base + 0x08)
446+
#define GPIO_OER(base) *(volatile uint32_t *)(base + 0x10)
447+
#define GPIO_ODR(base) *(volatile uint32_t *)(base + 0x14)
448+
#define GPIO_OSR(base) *(volatile uint32_t *)(base + 0x18)
449+
#define GPIO_SODR(base) *(volatile uint32_t *)(base + 0x30)
450+
#define GPIO_CODR(base) *(volatile uint32_t *)(base + 0x34)
451+
#define GPIO_IER(base) *(volatile uint32_t *)(base + 0x40)
452+
#define GPIO_IDR(base) *(volatile uint32_t *)(base + 0x44)
453+
#define GPIO_MDER(base) *(volatile uint32_t *)(base + 0x50)
454+
#define GPIO_MDDR(base) *(volatile uint32_t *)(base + 0x54)
455+
#define GPIO_PPUDR(base) *(volatile uint32_t *)(base + 0x60)
456+
#define GPIO_PPUER(base) *(volatile uint32_t *)(base + 0x64)
457+
#define GPIO_PPDDR(base) *(volatile uint32_t *)(base + 0x90)
458+
459+
460+
/* PMC Macro to enable clock */
461+
#define PMC_CLOCK_EN(id) { \
462+
register uint32_t pmc_pcr; \
463+
PMC_PCR = id; \
464+
pmc_pcr = PMC_PCR & (~PMC_PCR_DIV_MASK); \
465+
pmc_pcr |= PMC_PCR_CMD | PMC_PCR_EN; \
466+
PMC_PCR = pmc_pcr; \
467+
}
446468

447469

448470
#endif

‎hal/sama5d3.ld‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@ OUTPUT_ARCH(arm)
33

44
MEMORY
55
{
6-
DDR_MEM(rwx): ORIGIN = 0x00000000, LENGTH = 0x0000F000
6+
DDR_MEM(rwx): ORIGIN = 0x00000000, LENGTH = 0x000100000
77
}
88

99
ENTRY(reset_vector_entry)

‎include/user_settings.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,8 @@
4141

4242
/* Stdlib Types */
4343
#define CTYPE_USER /* don't let wolfCrypt types.h include ctype.h */
44+
45+
#ifndef WOLFSSL_ARMASM
4446
#ifndef toupper
4547
extern int toupper(int c);
4648
#endif
@@ -49,6 +51,7 @@ extern int tolower(int c);
4951
#endif
5052
#define XTOUPPER(c) toupper((c))
5153
#define XTOLOWER(c) tolower((c))
54+
#endif
5255

5356
#ifdef USE_FAST_MATH
5457
/* wolfBoot only does public asymmetric operations,

‎test-app/app_sama5d3.c‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -37,20 +37,20 @@
3737
void led_init(uint32_t pin)
3838
{
3939
uint32_t mask = 1U << pin;
40-
GPIOE_MDDR |= mask;
41-
GPIOE_PER |= mask;
42-
GPIOE_IDR |= mask;
43-
GPIOE_PPUDR |= mask;
44-
GPIOE_CODR |= mask;
40+
GPIO_MDDR(GPIOE) |= mask;
41+
GPIO_PER(GPIOE) |= mask;
42+
GPIO_IDR(GPIOE) |= mask;
43+
GPIO_PPUDR(GPIOE) |= mask;
44+
GPIO_CODR(GPIOE) |= mask;
4545
}
4646

4747
void led_put(uint32_t pin, int val)
4848
{
4949
uint32_t mask = 1U << pin;
5050
if (val)
51-
GPIOE_SODR |= mask;
51+
GPIO_SODR(GPIOE) |= mask;
5252
else
53-
GPIOE_CODR |= mask;
53+
GPIO_CODR(GPIOE) |= mask;
5454
}
5555

5656
volatile uint32_t time_elapsed = 0;

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