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jackpot51jackpot51
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Add darp11 and darp11-b
1 parent 01f4c5b commit 853d30c

11 files changed

Lines changed: 486 additions & 1 deletion

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‎src/mainboard/system76/mtl/Kconfig‎

Lines changed: 20 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,20 @@ config BOARD_SYSTEM76_DARP10_B
4040
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
4141
select SOC_INTEL_METEORLAKE_U_H
4242

43+
config BOARD_SYSTEM76_DARP11
44+
select BOARD_SYSTEM76_MTL_COMMON
45+
select EC_SYSTEM76_EC_FAN2
46+
select MAINBOARD_USES_IFD_GBE_REGION
47+
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
48+
select SOC_INTEL_METEORLAKE_U_H
49+
50+
config BOARD_SYSTEM76_DARP11_B
51+
select BOARD_SYSTEM76_MTL_COMMON
52+
select EC_SYSTEM76_EC_FAN2
53+
select MAINBOARD_USES_IFD_GBE_REGION
54+
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
55+
select SOC_INTEL_METEORLAKE_U_H
56+
4357
config BOARD_SYSTEM76_LEMP13
4458
select BOARD_SYSTEM76_MTL_COMMON
4559
select DRIVERS_I2C_TAS5825M
@@ -61,6 +75,7 @@ config MAINBOARD_DIR
6175

6276
config VARIANT_DIR
6377
default "darp10" if BOARD_SYSTEM76_DARP10 || BOARD_SYSTEM76_DARP10_B
78+
default "darp11" if BOARD_SYSTEM76_DARP11 || BOARD_SYSTEM76_DARP11_B
6479
default "lemp13" if BOARD_SYSTEM76_LEMP13 || BOARD_SYSTEM76_LEMP13_B
6580

6681
config OVERRIDE_DEVICETREE
@@ -69,16 +84,20 @@ config OVERRIDE_DEVICETREE
6984
config MAINBOARD_PART_NUMBER
7085
default "darp10" if BOARD_SYSTEM76_DARP10
7186
default "darp10-b" if BOARD_SYSTEM76_DARP10_B
87+
default "darp11" if BOARD_SYSTEM76_DARP11
88+
default "darp11-b" if BOARD_SYSTEM76_DARP11_B
7289
default "lemp13" if BOARD_SYSTEM76_LEMP13
7390
default "lemp13-b" if BOARD_SYSTEM76_LEMP13_B
7491

7592
config MAINBOARD_SMBIOS_PRODUCT_NAME
76-
default "Darter Pro" if BOARD_SYSTEM76_DARP10 || BOARD_SYSTEM76_DARP10_B
93+
default "Darter Pro" if BOARD_SYSTEM76_DARP10 || BOARD_SYSTEM76_DARP10_B || BOARD_SYSTEM76_DARP11 || BOARD_SYSTEM76_DARP11_B
7794
default "Lemur Pro" if BOARD_SYSTEM76_LEMP13 || BOARD_SYSTEM76_LEMP13_B
7895

7996
config MAINBOARD_VERSION
8097
default "darp10" if BOARD_SYSTEM76_DARP10
8198
default "darp10-b" if BOARD_SYSTEM76_DARP10_B
99+
default "darp11" if BOARD_SYSTEM76_DARP11
100+
default "darp11-b" if BOARD_SYSTEM76_DARP11_B
82101
default "lemp13" if BOARD_SYSTEM76_LEMP13
83102
default "lemp13-b" if BOARD_SYSTEM76_LEMP13_B
84103

‎src/mainboard/system76/mtl/Kconfig.name‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,12 @@ config BOARD_SYSTEM76_DARP10
66
config BOARD_SYSTEM76_DARP10_B
77
bool "darp10-b"
88

9+
config BOARD_SYSTEM76_DARP11
10+
bool "darp11"
11+
12+
config BOARD_SYSTEM76_DARP11_B
13+
bool "darp11-b"
14+
915
config BOARD_SYSTEM76_LEMP13
1016
bool "lemp13"
1117

‎src/mainboard/system76/mtl/variants/darp11/board.fmd‎

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
FLASH 32M {
2+
SI_DESC 16K
3+
SI_GBE 8K
4+
SI_ME 8612K
5+
SI_BIOS@16M 16M {
6+
RW_MRC_CACHE 64K
7+
SMMSTORE(PRESERVE) 256K
8+
WP_RO {
9+
FMAP 4K
10+
COREBOOT(CBFS)
11+
}
12+
}
13+
}

‎src/mainboard/system76/mtl/variants/darp11/board_info.txt‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,2 @@
1+
Board name: darp11
2+
Release year: 2025

‎src/mainboard/system76/mtl/variants/darp11/data.vbt‎

7.5 KB
Binary file not shown.

‎src/mainboard/system76/mtl/variants/darp11/gpio.c‎

Lines changed: 216 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,216 @@
1+
/* SPDX-License-Identifier: GPL-2.0-only */
2+
3+
#include <mainboard/gpio.h>
4+
#include <soc/gpio.h>
5+
6+
static const struct pad_config gpio_table[] = {
7+
PAD_CFG_NF(GPP_A00, UP_20K, DEEP, NF1), // ESPI_IO0_EC
8+
PAD_CFG_NF(GPP_A01, UP_20K, DEEP, NF1), // ESPI_IO1_EC
9+
PAD_CFG_NF(GPP_A02, UP_20K, DEEP, NF1), // ESPI_IO2_EC
10+
PAD_CFG_NF(GPP_A03, UP_20K, DEEP, NF1), // ESPI_IO3_EC
11+
PAD_CFG_NF(GPP_A04, UP_20K, DEEP, NF1), // ESPI_CS_EC#
12+
PAD_CFG_NF(GPP_A05, UP_20K, DEEP, NF1), // ESPI_CLK_EC
13+
PAD_CFG_NF(GPP_A06, NONE, DEEP, NF1), // ESPI_RESET_N
14+
// GPP_A07 missing
15+
// GPP_A08 missing
16+
// GPP_A09 missing
17+
// GPP_A10 missing
18+
PAD_CFG_GPO(GPP_A11, 0, DEEP), // ADDS_CODE
19+
PAD_CFG_GPI(GPP_A12, NONE, DEEP), // WLAN_WAKEUP#
20+
PAD_CFG_TERM_GPO(GPP_A13, 1, UP_20K, PLTRST), // M2_SSD2_RST#
21+
PAD_NC(GPP_A14, NONE),
22+
PAD_NC(GPP_A15, NONE), // CPU_SWI# (test point)
23+
PAD_CFG_NF(GPP_A16, UP_20K, DEEP, NF1), // ESPI_ALRT0#
24+
PAD_NC(GPP_A17, NONE), // TP_ATTN#_A17
25+
PAD_NC(GPP_A18, NONE),
26+
PAD_NC(GPP_A19, NONE),
27+
PAD_NC(GPP_A20, NONE),
28+
PAD_CFG_NF(GPP_A21, NATIVE, DEEP, NF1), // PMC_I2C_INT
29+
30+
PAD_CFG_GPI_INT(GPP_B00, NONE, PLTRST, LEVEL), // TP_ATTN#_B00
31+
PAD_NC(GPP_B01, NONE),
32+
PAD_NC(GPP_B02, NONE),
33+
PAD_NC(GPP_B03, NONE),
34+
PAD_CFG_GPO(GPP_B04, 0, DEEP), // NO REBOOT strap
35+
PAD_CFG_GPO(GPP_B05, 0, DEEP), // CPU_KBCRST# (test point)
36+
PAD_CFG_GPO(GPP_B06, 0, DEEP), // ROM_I2C_EN
37+
PAD_NC(GPP_B07, NONE),
38+
PAD_NC(GPP_B08, NONE),
39+
PAD_NC(GPP_B09, NONE),
40+
PAD_NC(GPP_B10, NONE),
41+
PAD_CFG_NF(GPP_B11, NONE, DEEP, NF2), // HDMI_HPD
42+
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), // SLP_S0#
43+
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), // PLTRST#
44+
PAD_CFG_GPI(GPP_B14, NONE, DEEP), // Top swap override strap
45+
PAD_CFG_GPI(GPP_B15, NONE, DEEP), // GPP_B15_USB2_OC0_N
46+
PAD_NC(GPP_B16, NONE),
47+
PAD_NC(GPP_B17, NONE),
48+
PAD_CFG_GPO(GPP_B18, 1, DEEP), // PCH_BT_EN
49+
PAD_CFG_GPO(GPP_B19, 1, DEEP), // WIFI_RF_EN
50+
PAD_NC(GPP_B20, NONE),
51+
PAD_CFG_GPO(GPP_B21, 0, PLTRST), // TCP_RETIMER_FORCE_PWR
52+
PAD_NC(GPP_B22, NONE),
53+
PAD_NC(GPP_B23, NONE),
54+
55+
PAD_CFG_NF(GPP_C00, NONE, DEEP, NF1), // SMB_CLK
56+
PAD_CFG_NF(GPP_C01, NONE, DEEP, NF1), // SMB_DATA
57+
PAD_CFG_NF(GPP_C02, NONE, DEEP, NF1), // TLS confidentiality strap
58+
PAD_CFG_NF(GPP_C03, UP_20K, DEEP, NF1), // SML0_CLK
59+
PAD_CFG_NF(GPP_C04, UP_20K, DEEP, NF1), // SML0_DATA
60+
PAD_CFG_NF(GPP_C05, UP_20K, DEEP, NF1), // eSPI disabled strap
61+
PAD_CFG_NF(GPP_C06, UP_20K, DEEP, NF1), // PMC_I2C_SCL
62+
PAD_CFG_NF(GPP_C07, UP_20K, DEEP, NF1), // PMC_I2C_SDA
63+
PAD_NC(GPP_C08, NONE),
64+
PAD_NC(GPP_C09, NONE),
65+
PAD_NC(GPP_C10, NONE),
66+
PAD_CFG_NF(GPP_C11, NONE, PWROK, NF1), // CPU_LAN_CLKREQ#
67+
PAD_CFG_NF(GPP_C12, NONE, PWROK, NF1), // CPU_CARD_CLKREQ#
68+
PAD_NC(GPP_C13, NONE),
69+
// GPP_C14 missing
70+
PAD_CFG_GPO(GPP_C15, 0, DEEP), // GPP_C15_STRAP
71+
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), // TBT_LSX0_TXD
72+
PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), // TBT_LSX0_RXD
73+
PAD_NC(GPP_C18, NONE),
74+
PAD_NC(GPP_C19, NONE),
75+
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF2), // HDMI_CTRLCLK
76+
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF2), // HDMI_CTRLDATA
77+
PAD_NC(GPP_C22, NONE),
78+
PAD_NC(GPP_C23, NONE),
79+
80+
PAD_CFG_GPO(GPP_D00, 1, DEEP), // SB_BLON
81+
PAD_CFG_GPO(GPP_D01, 1, DEEP), // SSD2_PWR_EN
82+
PAD_CFG_GPO(GPP_D02, 1, DEEP), // M2_SSD1_RST#
83+
PAD_NC(GPP_D03, NONE),
84+
PAD_NC(GPP_D04, NONE),
85+
PAD_CFG_GPO(GPP_D05, 1, DEEP), // SSD1_PWR_EN
86+
PAD_NC(GPP_D06, NONE),
87+
PAD_NC(GPP_D07, NONE),
88+
PAD_NC(GPP_D08, NONE),
89+
PAD_NC(GPP_D09, NONE),
90+
PAD_CFG_NF(GPP_D10, NONE, DEEP, NF1), // HDA_BITCLK
91+
PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1), // HDA_SYNC
92+
PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1), // HDA_SDOUT / ME_WE
93+
PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1), // HDA_SDI0
94+
PAD_NC(GPP_D14, NONE),
95+
PAD_NC(GPP_D15, NONE),
96+
PAD_CFG_GPO(GPP_D16, 0, DEEP), // GPIO_SPK_MUTE
97+
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1), // HDA_RST#
98+
PAD_NC(GPP_D18, NONE),
99+
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1), // CPU_SSD1_CLKREQ#
100+
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1), // CPU_SSD2_CLKREQ#
101+
PAD_CFG_NF(GPP_D21, NONE, DEEP, NF2), // CPU_WLAN_CLKREQ#
102+
PAD_CFG_NF(GPP_D22, NATIVE, DEEP, NF1),
103+
PAD_CFG_NF(GPP_D23, NATIVE, DEEP, NF1),
104+
105+
PAD_NC(GPP_E00, NONE),
106+
_PAD_CFG_STRUCT(GPP_E01, 0x40100100, 0x3000), // TPM_PIRQ#
107+
PAD_CFG_GPI(GPP_E02, NONE, DEEP), // BOARD_ID4
108+
PAD_CFG_GPI(GPP_E03, NONE, DEEP), // CNVI_WAKE#
109+
PAD_NC(GPP_E04, NONE),
110+
PAD_NC(GPP_E05, NONE),
111+
PAD_CFG_GPO(GPP_E06, 0, DEEP), // JTAG ODT disable strap
112+
PAD_NC(GPP_E07, NONE),
113+
PAD_NC(GPP_E08, NONE),
114+
PAD_CFG_GPI(GPP_E09, NONE, DEEP), // GPP_E9_USB2_OC0_N
115+
PAD_NC(GPP_E10, NONE),
116+
PAD_CFG_GPI(GPP_E11, NONE, DEEP), // BOARD_ID6
117+
PAD_NC(GPP_E12, NONE),
118+
PAD_NC(GPP_E13, NONE),
119+
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), // EDP_HPD
120+
PAD_NC(GPP_E15, NONE),
121+
PAD_CFG_NF(GPP_E16, NONE, DEEP, NF2), // VRALERT#
122+
PAD_CFG_GPO(GPP_E17, 0, DEEP), // BOARD_ID5
123+
// GPP_E18 missing
124+
// GPP_E19 missing
125+
// GPP_E20 missing
126+
// GPP_E21 missing
127+
PAD_CFG_GPO(GPP_E22, 0, DEEP), // DNX_FORCE_RELOAD
128+
129+
PAD_CFG_NF(GPP_F00, NONE, DEEP, NF1), // CNVI_BRI_DT
130+
PAD_CFG_NF(GPP_F01, UP_20K, DEEP, NF1), // CNVI_BRI_RSP
131+
PAD_CFG_NF(GPP_F02, NONE, DEEP, NF1), // CNVI_RGI_DT
132+
PAD_CFG_NF(GPP_F03, UP_20K, DEEP, NF1), // CNVI_RGI_RSP
133+
PAD_CFG_NF(GPP_F04, NONE, DEEP, NF1), // CNVI_RST#
134+
PAD_CFG_NF(GPP_F05, NONE, DEEP, NF3), // CNVI_CLKREQ
135+
PAD_CFG_GPO(GPP_F06, 0, DEEP), // CNVI_GNSS_PA_BLANKING
136+
PAD_NC(GPP_F07, NONE),
137+
PAD_NC(GPP_F08, NONE),
138+
PAD_CFG_GPI(GPP_F09, NONE, DEEP), // TPM_DET
139+
PAD_NC(GPP_F10, NONE),
140+
PAD_CFG_GPO(GPP_F11, 0, DEEP), // BOARD_ID3
141+
PAD_NC(GPP_F12, NONE), // I2C_SCL_CODEC
142+
PAD_NC(GPP_F13, NONE), // I2C_SDA_CODEC
143+
PAD_CFG_GPO(GPP_F14, 0, DEEP), // BOARD_ID1
144+
PAD_CFG_GPO(GPP_F15, 0, DEEP), // BOARD_ID2
145+
PAD_NC(GPP_F16, NONE),
146+
PAD_NC(GPP_F17, NONE),
147+
PAD_CFG_GPO(GPP_F18, 0, DEEP), // CPU_CCD_WP#
148+
PAD_NC(GPP_F19, NONE),
149+
PAD_CFG_GPO(GPP_F20, 0, DEEP), // SVID support strap
150+
PAD_NC(GPP_F21, NONE),
151+
PAD_NC(GPP_F22, NONE),
152+
PAD_NC(GPP_F23, NONE),
153+
154+
PAD_CFG_GPO(GPP_H00, 0, DEEP), // eSPI flash sharing mode strap
155+
PAD_CFG_GPO(GPP_H01, 0, DEEP), // SPI flash descriptor recovery strap
156+
PAD_NC(GPP_H02, NONE),
157+
// GPP_H03 missing
158+
PAD_CFG_GPO(GPP_H04, 0, DEEP), // CNVI_MFUART2_RXD
159+
PAD_CFG_GPO(GPP_H05, 0, DEEP), // CNVI_MFUART2_TXD
160+
PAD_CFG_NF(GPP_H06, NONE, DEEP, NF1), // I2C3_SDA (Pantone)
161+
PAD_CFG_NF(GPP_H07, NONE, DEEP, NF1), // I2C3_SCL (Pantone)
162+
// GPP_H08 (UART0_RXD) configured in bootblock
163+
// GPP_H09 (UART0_TXD) configured in bootblock
164+
PAD_CFG_GPO(GPP_H10, 0, DEEP),
165+
PAD_CFG_GPO(GPP_H11, 0, DEEP),
166+
PAD_CFG_GPO(GPP_H12, 0, DEEP),
167+
PAD_NC(GPP_H13, NONE),
168+
PAD_NC(GPP_H14, NONE),
169+
PAD_NC(GPP_H15, NONE),
170+
PAD_NC(GPP_H16, NONE),
171+
PAD_NC(GPP_H17, NONE),
172+
// GPP_H18 missing
173+
PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), // I2C_SDA_TP
174+
PAD_CFG_NF(GPP_H20, NONE, DEEP, NF1), // I2C_SCL_TP
175+
PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1), // PCH_I2C_SDA
176+
PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1), // PCH_I2C_SCL
177+
178+
PAD_NC(GPP_S00, NONE),
179+
PAD_NC(GPP_S01, NONE),
180+
PAD_NC(GPP_S02, NONE), // DMIC_CLK_A1
181+
PAD_NC(GPP_S03, NONE), // DMIC_DATA_A1
182+
PAD_NC(GPP_S04, NONE),
183+
PAD_NC(GPP_S05, NONE),
184+
PAD_NC(GPP_S06, NONE),
185+
PAD_NC(GPP_S07, NONE),
186+
187+
PAD_CFG_NF(GPP_V00, NONE, DEEP, NF1), // PM_BATLOW#
188+
PAD_CFG_NF(GPP_V01, NONE, DEEP, NF1), // AC_PRESENT
189+
PAD_CFG_NF(GPP_V02, NONE, DEEP, NF1), // LAN_WAKEUP#
190+
PAD_CFG_NF(GPP_V03, NONE, DEEP, NF1), // PWR_BTN#
191+
PAD_CFG_NF(GPP_V04, NONE, DEEP, NF1), // SUSB#_PCH
192+
PAD_CFG_NF(GPP_V05, UP_20K, DEEP, NF1), // SUSC#_PCH
193+
PAD_CFG_NF(GPP_V06, NATIVE, DEEP, NF1), // SLP_A#
194+
// GPP_V07 missing
195+
PAD_CFG_NF(GPP_V08, UP_20K, DEEP, NF1), // SUS_CLK
196+
PAD_CFG_NF(GPP_V09, NONE, DEEP, NF1), // SLP_WLAN#
197+
PAD_NC(GPP_V10, NONE),
198+
PAD_CFG_NF(GPP_V11, NONE, DEEP, NF1), // LANPHYPC
199+
PAD_CFG_GPO(GPP_V12, 0, DEEP), // SLP_LAN#
200+
// GPP_V13 missing
201+
PAD_CFG_NF(GPP_V14, NONE, DEEP, NF1), // PCIE_WAKE#
202+
// GPP_V15 missing
203+
// GPP_V16 missing
204+
// GPP_V17 missing
205+
// GPP_V18 missing
206+
// GPP_V19 missing
207+
// GPP_V20 missing
208+
// GPP_V21 missing
209+
PAD_NC(GPP_V22, NONE),
210+
PAD_NC(GPP_V23, NONE),
211+
};
212+
213+
void mainboard_configure_gpios(void)
214+
{
215+
gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
216+
}

‎src/mainboard/system76/mtl/variants/darp11/gpio_early.c‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
/* SPDX-License-Identifier: GPL-2.0-only */
2+
3+
#include <mainboard/gpio.h>
4+
#include <soc/gpio.h>
5+
6+
static const struct pad_config early_gpio_table[] = {
7+
PAD_CFG_NF(GPP_C00, NONE, DEEP, NF1), // SMB_CLK
8+
PAD_CFG_NF(GPP_C01, NONE, DEEP, NF1), // SMB_DATA
9+
PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1), // UART0_RX
10+
PAD_CFG_NF(GPP_H09, NONE, DEEP, NF1), // UART0_TX
11+
};
12+
13+
void mainboard_configure_early_gpios(void)
14+
{
15+
gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
16+
}

‎src/mainboard/system76/mtl/variants/darp11/hda_verb.c‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,59 @@
1+
/* SPDX-License-Identifier: GPL-2.0-only */
2+
3+
#include <device/azalia_device.h>
4+
5+
const u32 cim_verb_data[] = {
6+
/* Realtek, ALC245 */
7+
0x10ec0245, /* Vendor ID */
8+
0x1558a763, /* Subsystem ID */
9+
40, /* Number of entries */
10+
//AZALIA_SUBVENDOR(0, 0x1558a763),
11+
AZALIA_SUBVENDOR(0, 0x1558a743),
12+
AZALIA_RESET(1),
13+
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
14+
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
15+
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
16+
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
17+
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
18+
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
19+
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
20+
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
21+
AZALIA_PIN_CFG(0, 0x1d, 0x40789b2d),
22+
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
23+
AZALIA_PIN_CFG(0, 0x21, 0x04211020),
24+
25+
0x05b50006, 0x05b40011, 0x0205001a, 0x0204810b,
26+
0x0205004a, 0x02042010, 0x02050038, 0x02047909,
27+
0x05c50000, 0x05c43d82, 0x05c50000, 0x05c43d82,
28+
0x05350000, 0x0534201a, 0x05350000, 0x0534201a,
29+
0x0535001d, 0x05340800, 0x0535001e, 0x05340800,
30+
0x05350003, 0x05341ec4, 0x05350004, 0x05340000,
31+
0x05450000, 0x05442000, 0x0545001d, 0x05440800,
32+
0x0545001e, 0x05440800, 0x05450003, 0x05441ec4,
33+
0x05450004, 0x05440000, 0x05350000, 0x0534a01a,
34+
0x0205003c, 0x0204f175, 0x0205003c, 0x0204f135,
35+
0x02050040, 0x02048800, 0x05a50001, 0x05a4001f,
36+
0x02050010, 0x02040020, 0x02050010, 0x02040020,
37+
0x0205006b, 0x0204a390, 0x0205006b, 0x0204a390,
38+
0x0205006c, 0x02040c9e, 0x0205006d, 0x02040c00,
39+
0x00170500, 0x00170500, 0x05a50004, 0x05a40113,
40+
0x02050008, 0x02046a8c, 0x02050076, 0x0204f000,
41+
0x0205000e, 0x020465c0, 0x02050033, 0x02048580,
42+
0x02050069, 0x0204fda8, 0x02050068, 0x02040000,
43+
0x02050003, 0x02040002, 0x02050069, 0x02040000,
44+
0x02050068, 0x02040001, 0x0205002e, 0x0204290e,
45+
0x02236100, 0x02235100, 0x00920011, 0x00970610,
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0x00936000, 0x00935000, 0x0205000d, 0x0204a020,
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0x00220011, 0x00270610, 0x0023a046, 0x00239046,
48+
0x0173b000, 0x01770740, 0x05a50001, 0x05a4001f,
49+
0x05c5000f, 0x05c40003, 0x02050036, 0x020437d7,
50+
0x0143b000, 0x01470740, 0x02050010, 0x02040020,
51+
0x01470c02, 0x01470c02,
52+
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// XXX: Duplicate last 2 u32s to keep in 4-dword blocks
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0x01470c02, 0x01470c02,
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};
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const u32 pc_beep_verbs[] = {};
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59+
AZALIA_ARRAY_SIZES;

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