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finley1226rkhuangtao
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clk: rockchip: half-divider: Fix error value when bestdiv is zero
Zero is a valid value for half-divider. Change-Id: I23aa8afcd391da95396e5d808c3c424f993c66e3 Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
1 parent 6ccd9a7 commit 734b08e

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Lines changed: 3 additions & 1 deletion

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drivers/clk/rockchip/clk-half-divider.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@ static int clk_half_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
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unsigned int i, bestdiv = 0;
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unsigned long parent_rate, best = 0, now, maxdiv;
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unsigned long parent_rate_saved = *best_parent_rate;
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bool is_bestdiv = false;
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if (!rate)
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rate = 1;
@@ -80,13 +81,14 @@ static int clk_half_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
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(i * 2 + 3));
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if (_is_best_half_div(rate, now, best, flags)) {
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is_bestdiv = true;
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bestdiv = i;
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best = now;
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*best_parent_rate = parent_rate;
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}
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}
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if (!bestdiv) {
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if (!is_bestdiv) {
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bestdiv = div_mask(width);
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*best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), 1);
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}

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