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About me

I am currently a Principal Research Scientist at Code Metal, where we are developing and applying AI and formal method techniques for code migration and optimization. My research interests are at the intersection of application of artificial intelligence, machine learning, and formal method techniques to problems in compilers, HPC, software systems, and software engineering. For past few months, along with my collaborators, I have been also exploring AI-driven techniques to automatically parallelize serial code for shared-memory and distributed-memory systems.

Before joining Code Metal, I was a Research Scientist at Machine Programming Lab in Intel Labs. I was also part of a research project exploring an MLIR-based compiler for high-performance deep learning on Intel Xeon platforms. Orthogonally, I also implemented and published an autonomous system, named ControlFlag, that learns to detect programming errors in code. ControlFlag is open-source now, and has been covered by several news outlets such as Communications of ACM, Venturebeat, ZDNet, TechRepublic, etc. Additionally, as a part of my interest, I was also collaborating with Prof. Alvin Cheung and his group at UC Berkeley on the problem of code translation with formal verification.

Prior to joining Intel, I was a PhD student at Secure Systems Lab at Stony Brook University, and I was advised by Prof. R. Sekar. At Stony Brook, I conducted research in program analysis, symbolic execution, machine learning techniques to learn code translators, and binary analysis.

(Some of the) Publications

(Complete list is in Google Scholar)

  • ParaCodex: A Profiling-Guided Autonomous Coding Agent for Reliable Parallel Code Generation and Translation [pdf]
    Erel Kaplan, Tomer Bitan, Lian Ghrayeb, Le Chen, Tom Yotam, Niranjan Hasabnis, Gal Oren
    In Association of Computational Linguistics (ACL), 2026

  • Pcebench: A multi-dimensional benchmark for evaluating large language models in parallel code generation [pdf]
    Le Chen, Nesreen Ahmed, Mihai Capotă, Ted Willke, Niranjan Hasabnis, Ali Jannesari
    In IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2025

  • Unipar: A unified llm-based framework for parallel and accelerated code translation in hpc [pdf]
    Tomer Bitan, Tal Kadosh, Erel Kaplan, Shira Meiri, Le Chen, Peter Morales, Niranjan Hasabnis, Gal Oren
    In 9th Annual IEEE High Performance Extreme Computing Conference (HPEC), 2025

  • Verified Code Transpilation with LLMs [pdf]
    Sahil Bhatia, Jie Qiu, Niranjan Hasabnis, Sanjit A. Seshia, Alvin Cheung
    In NeurIPS 2024

  • Tenspiler: A Verified Lifting-Based Compiler for Tensor Operations [pdf]
    Jie Qiu, Colin Cai, Sahil Bhatia, Niranjan Hasabnis, Sanjit A Seshia, Alvin Cheung
    In European Conference on Object-oriented Programming ECOOP, 2024

  • MonoCoder: Domain-Specific Code Language Model for HPC Codes and Tasks [pdf]
    Tal Kadosh, Niranjan Hasabnis, Vy Vo, Nadav Schneider, Neva Krien, Mihai Capotă, Abdul Wasay, Guy Tamir, Theodore L Willke, Nesreen Ahmed, Yuval Pinter, Tim Mattson, Gal Oren
    In 8th Annual IEEE High Performance Extreme Computing Virtual Conference (HPEC), 2024
    Outstanding Paper Award

  • OMPar: Automatic Parallelization with AI-Driven Source-to-Source Compilation [pdf]
    Tal Kadosh, Niranjan Hasabnis, Prema Soundararajan, Vy A Vo, Mihai Capota, Nesreen Ahmed, Yuval Pinter, Gal Oren
    To appear in MLforSys at NeurIPS, 2024

  • Quantifying OpenMP: Statistical Insights into Usage and Adoption [pdf]
    Tal Kadosh, Niranjan Hasabnis, Timothy Mattson, Yuval Pinter, Gal Oren
    In 27th IEEE High Performance Extreme Computing (HPEC), 2023

  • MPI-rical: Data-Driven MPI Distributed Parallelism Assistance with Transformers [pdf]
    Nadav Schneider, Tal Kadosh, Niranjan Hasabnis, Timothy Mattson, Yuval Pinter, Gal Oren
    In AI4Dev workshop (AI4Dev) at SuperComputing, 2023

  • GitRank: A Framework to Rank GitHub Repositories [pdf], [video], [git]
    Niranjan Hasabnis
    In Mining Software Repositories (MSR), 2022

  • ControlFlag: A Self-supervised Idiosyncratic Pattern Detection System for Software Control Structures [pdf]
    Niranjan Hasabnis and Justin Gottschlich
    In Workshop on ML for Systems at NeurIPS, 2020

  • Auto-tuning TensorFlow’s Threading Model for CPU Backend [pdf]
    Niranjan Hasabnis
    In IEEE/ACM Machine Learning in HPC Environments (MLHPC), 2018

  • Synthesizing Instruction-set semantics using Symbolic Execution of Code Generators [pdf]
    Niranjan Hasabnis and R. Sekar.
    In ACM SIGSOFT International Symposium on Foundations of Software Engineering (FSE), 2016

  • Lifting Assembly to Intermediate Representation: A Novel Approach Leveraging Compiler [pdf]
    Niranjan Hasabnis and R. Sekar.
    In ACM Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2016

  • [PhD Thesis] Automatic Synthesis of Instruction Set Semantics and its Applications [pdf]
    Niranjan Hasabnis
    Stony Brook University

  • Checking Correctness of Compiler Code Generators [pdf]
    Niranjan Hasabnis, Rui Qiao, and R. Sekar.
    In International Symposium on Code Generation and Optimization (CGO), 2015

  • A Platform for Secure Static Binary Instrumentation [pdf]
    Mingwei Zheng, Rui Qiao, Niranjan Hasabnis, and R. Sekar.
    In International Conference on Virtual Execution Environments (VEE), 2014

Service

Awards

  • Outstanding paper award for Monocoder paper at HPEC 2024
  • High 5 Award for filing atleast 5 invention disclosures, Intel, 2022
  • Silver medal in ACM Student Research Competition, Code Generation and Optimization (CGO), 2015.
  • Computer Science Fellowship, Stony Brook University, 2010.
  • Graduate Tuition Scholarship, Stony Brook University, 2010–2015.