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AndreasAakessonAndreasAakesson
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Merge branch 'dev' of github.com:fwsGonzo/IncludeOS into dev
2 parents 89c46d2 + 45ec13e commit e7e66c1

5 files changed

Lines changed: 327 additions & 127 deletions

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‎api/kernel/cpuid.hpp‎

Lines changed: 96 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,9 @@
66
// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
9-
//
9+
//
1010
// http://www.apache.org/licenses/LICENSE-2.0
11-
//
11+
//
1212
// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
1414
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@@ -19,10 +19,99 @@
1919
#ifndef KERNEL_CPUID_HPP
2020
#define KERNEL_CPUID_HPP
2121

22-
struct CPUID {
23-
static bool isAmdCpu();
24-
static bool isIntelCpu();
25-
static bool hasRDRAND();
26-
}; //< CPUID
22+
namespace CPUID
23+
{
24+
enum class Feature
25+
{
26+
// ------------------------------------------------------------------------
27+
// Processor Info and Feature Bits
28+
// ------------------------------------------------------------------------
29+
SSE3, // Streaming SIMD Extensions 3
30+
PCLMULQDQ, // PCLMULQDQ Instruction
31+
DTES64, // 64-Bit Debug Store Area
32+
MONITOR, // MONITOR/MWAIT
33+
DS_CPL, // CPL Qualified Debug Store
34+
VMX, // Virtual Machine Extensions
35+
SMX, // Safer Mode Extensions
36+
EST, // Enhanced SpeedStep Technology
37+
TM2, // Thermal Monitor 2
38+
SSSE3, // Supplemental Streaming SIMD Extensions 3
39+
CNXT_ID, // L1 Context ID
40+
FMA, // Fused Multiply Add
41+
CX16, // CMPXCHG16B Instruction
42+
XTPR, // xTPR Update Control
43+
PDCM, // Perf/Debug Capability MSR
44+
PCID, // Process-context Identifiers
45+
DCA, // Direct Cache Access
46+
SSE4_1, // Streaming SIMD Extensions 4.1
47+
SSE4_2, // Streaming SIMD Extensions 4.2
48+
X2APIC, // Extended xAPIC Support
49+
MOVBE, // MOVBE Instruction
50+
POPCNT, // POPCNT Instruction
51+
TSC_DEADLINE, // Local APIC supports TSC Deadline
52+
AES, // AESNI Instruction
53+
XSAVE, // XSAVE/XSTOR States
54+
OSXSAVE, // OS Enabled Extended State Management
55+
AVX, // AVX Instructions
56+
F16C, // 16-bit Floating Point Instructions
57+
RDRAND, // RDRAND Instruction
58+
59+
FPU, // Floating-Point Unit On-Chip
60+
VME, // Virtual 8086 Mode Extensions
61+
DE, // Debugging Extensions
62+
PSE, // Page Size Extension
63+
TSC, // Time Stamp Counter
64+
MSR, // Model Specific Registers
65+
PAE, // Physical Address Extension
66+
MCE, // Machine-Check Exception
67+
CX8, // CMPXCHG8 Instruction
68+
APIC, // APIC On-Chip
69+
SEP, // SYSENTER/SYSEXIT instructions
70+
MTRR, // Memory Type Range Registers
71+
PGE, // Page Global Bit
72+
MCA, // Machine-Check Architecture
73+
CMOV, // Conditional Move Instruction
74+
PAT, // Page Attribute Table
75+
PSE_36, // 36-bit Page Size Extension
76+
PSN, // Processor Serial Number
77+
CLFLUSH, // CLFLUSH Instruction
78+
DS, // Debug Store
79+
ACPI, // Thermal Monitor and Software Clock Facilities
80+
MMX, // MMX Technology
81+
FXSR, // FXSAVE and FXSTOR Instructions
82+
SSE, // Streaming SIMD Extensions
83+
SSE2, // Streaming SIMD Extensions 2
84+
SS, // Self Snoop
85+
HTT, // Multi-Threading
86+
TM, // Thermal Monitor
87+
PBE, // Pending Break Enable
88+
89+
// ------------------------------------------------------------------------
90+
// Extended Processor Info and Feature Bits (not complete)
91+
// ------------------------------------------------------------------------
92+
SYSCALL, // SYSCALL/SYSRET
93+
NX, // Execute Disable Bit
94+
PDPE1GB, // 1 GB Pages
95+
RDTSCP, // RDTSCP and IA32_TSC_AUX
96+
LM, // Long mode (64-bit Architecture)
97+
};
98+
99+
bool is_amd_cpu();
100+
bool is_intel_cpu();
101+
bool has_feature(Feature f);
102+
103+
unsigned kvm_function();
104+
bool kvm_feature(unsigned id);
105+
} //< CPUID
106+
107+
#define KVM_FEATURE_CLOCKSOURCE 0
108+
#define KVM_FEATURE_NOP_IO_DELAY 1
109+
#define KVM_FEATURE_MMU_OP 2 /* deprecated */
110+
#define KVM_FEATURE_CLOCKSOURCE2 3
111+
#define KVM_FEATURE_ASYNC_PF 4
112+
#define KVM_FEATURE_STEAL_TIME 5
113+
#define KVM_FEATURE_PV_EOI 6
114+
#define KVM_FEATURE_PV_UNHALT 7
115+
#define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24
27116

28117
#endif //< KERNEL_CPUID_HPP

‎api/kernel/timers.hpp‎

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -7,9 +7,9 @@
77
// Licensed under the Apache License, Version 2.0 (the "License");
88
// you may not use this file except in compliance with the License.
99
// You may obtain a copy of the License at
10-
//
10+
//
1111
// http://www.apache.org/licenses/LICENSE-2.0
12-
//
12+
//
1313
// Unless required by applicable law or agreed to in writing, software
1414
// distributed under the License is distributed on an "AS IS" BASIS,
1515
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@@ -28,28 +28,30 @@
2828
class Timers
2929
{
3030
public:
31-
using id_t = uint32_t;
31+
using id_t = int32_t;
3232
using duration_t = std::chrono::microseconds;
3333
using handler_t = delegate<void(id_t)>;
34-
34+
35+
static constexpr id_t UNUSED_ID = -1;
36+
3537
/// create a one-shot timer that triggers @when from now
3638
/// returns a timer id
3739
static id_t oneshot(duration_t when, const handler_t&);
3840
/// create a periodic timer that begins @when and repeats every @period
3941
static id_t periodic(duration_t when, duration_t period, const handler_t&);
4042
// un-schedule timer, and free it
4143
static void stop(id_t);
42-
44+
4345
/// returns the number of current, active timers
4446
static size_t active();
45-
47+
4648
/// initialization
4749
typedef delegate<void(duration_t)> start_func_t;
4850
typedef delegate<void()> stop_func_t;
4951
static void init(const start_func_t&, const stop_func_t&);
5052
/// signal from the underlying hardware that it is calibrated and ready to go
5153
static void ready();
52-
54+
5355
/// handler that processes timer interrupts
5456
static void timers_handler();
5557
};

‎api/net/tcp/connection.hpp‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -880,7 +880,6 @@ class Connection : public std::enable_shared_from_this<Connection> {
880880
*/
881881
void rtx_timeout(Timer::id_t);
882882

883-
884883
/** Start the timewait timeout for 2*MSL */
885884
void timewait_start();
886885

‎src/hw/apic.cpp‎

Lines changed: 15 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222
#include <hw/apic_revenant.hpp>
2323
#include <hw/cpu.hpp>
2424
#include <hw/pic.hpp>
25+
#include <kernel/cpuid.hpp>
2526
#include <kernel/irq_manager.hpp>
2627
#include <cstdio>
2728
#include <debug>
@@ -73,6 +74,10 @@ namespace hw {
7374

7475
void APIC::init()
7576
{
77+
// use KVMs paravirt EOI if supported
78+
//if (CPUID::kvm_feature(KVM_FEATURE_PV_EOI))
79+
// kvm_pv_eoi_init();
80+
7681
const uint64_t APIC_BASE_MSR = CPU::read_msr(IA32_APIC_BASE_MSR);
7782
/// find the LAPICs base address ///
7883
const uintptr_t APIC_BASE_ADDR = APIC_BASE_MSR & 0xFFFFF000;
@@ -103,9 +108,6 @@ namespace hw {
103108
init_smp();
104109
}
105110

106-
// use KVMs paravirt EOI if supported
107-
//kvm_pv_eoi_init();
108-
109111
// subscribe to APIC-related interrupts
110112
setup_subs();
111113
}
@@ -210,14 +212,14 @@ namespace hw {
210212

211213
uint8_t APIC::get_isr()
212214
{
213-
for (uint8_t i = 0; i < 8; i++)
215+
for (int i = 8; i >= 0; i--)
214216
if (lapic.regs->isr[i].reg)
215217
return 32 * i + __builtin_ffs(lapic.regs->isr[i].reg) - 1;
216218
return 255;
217219
}
218220
uint8_t APIC::get_irr()
219221
{
220-
for (uint8_t i = 0; i < 8; i++)
222+
for (int i = 8; i >= 0; i--)
221223
if (lapic.regs->irr[i].reg)
222224
return 32 * i + __builtin_ffs(lapic.regs->irr[i].reg) - 1;
223225
return 255;
@@ -318,7 +320,6 @@ namespace hw {
318320
// http://choon.net/forum/read.php?21,1123399
319321
// https://www.kernel.org/doc/Documentation/virtual/kvm/cpuid.txt
320322

321-
#define KVM_FEATURE_PV_EOI 6
322323
#define KVM_MSR_ENABLED 1
323324
#define MSR_KVM_PV_EOI_EN 0x4b564d04
324325
#define KVM_PV_EOI_BIT 0
@@ -353,11 +354,15 @@ void kvm_pv_eoi() {
353354
//printf("AFTER: %#lx intr %u irr %u\n", kvm_apic_eoi, hw::APIC::get_isr(), hw::APIC::get_irr());
354355
}
355356
void kvm_pv_eoi_init() {
357+
//printf("* Enabling KVM paravirtual EOI\n");
358+
// set new EOI handler
359+
current_eoi_mechanism = kvm_pv_eoi;
360+
// setup PV EOI using local variable
356361
kvm_apic_eoi = 0;
357362
auto pv_eoi = (uintptr_t) &kvm_apic_eoi;
358-
printf("MSR %#x pv_eoi = %#x\n", MSR_KVM_PV_EOI_EN, pv_eoi);
363+
//printf(" MSR %#x pv_eoi = %#x\n", MSR_KVM_PV_EOI_EN, pv_eoi);
359364
hw::CPU::write_msr(MSR_KVM_PV_EOI_EN, pv_eoi | KVM_MSR_ENABLED, 0);
360-
// set new EOI handler
361-
current_eoi_mechanism = kvm_pv_eoi;
362-
kvm_apic_eoi = KVM_PV_EOI_ENABLED;
365+
// verify that the feature was enabled
366+
auto res = hw::CPU::read_msr(MSR_KVM_PV_EOI_EN);
367+
assert(res == (pv_eoi | KVM_MSR_ENABLED));
363368
}

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