pit: Mask off interrupt in IOAPIC when unused, apic: Use remapping also for disabling IRQs

Author: fwsGonzo

api/kernel/irq_manager.hpp

@@ -75,6 +75,7 @@ class IRQ_manager {
    *  @param irq: the IRQ to enable
    */
   void enable_irq(uint8_t irq);
+  void disable_irq(uint8_t irq);
 
   /**
    *  Directly set an IRQ handler in IDT

src/hw/apic.cpp

@@ -48,6 +48,7 @@ namespace hw {
   static const uintptr_t IA32_APIC_BASE_MSR = 0x1B;
   static const uintptr_t IA32_APIC_BASE_MSR_ENABLE = 0x800;
   static const uintptr_t BOOTLOADER_LOCATION = 0x80000;
+  static const uint8_t   SPURIOUS_INTR = IRQ_manager::INTR_LINES-1;
 
   // every CPU has a local APIC
   apic lapic;
@@ -123,7 +124,6 @@ namespace hw {
 
     // start receiving interrupts (0x100), set spurious vector
     // note: spurious IRQ must have 4 last bits set (0x?F)
-    const uint8_t SPURIOUS_INTR = IRQ_manager::INTR_LINES-1;
     lapic.enable_intr(SPURIOUS_INTR);
 
     // acknowledge any outstanding interrupts
@@ -213,14 +213,14 @@ namespace hw {
     for (uint8_t i = 0; i < 8; i++)
       if (lapic.regs->isr[i].reg)
         return 32 * i + __builtin_ffs(lapic.regs->isr[i].reg) - 1;
-    return 0;
+    return 255;
   }
   uint8_t APIC::get_irr()
   {
     for (uint8_t i = 0; i < 8; i++)
       if (lapic.regs->irr[i].reg)
         return 32 * i + __builtin_ffs(lapic.regs->irr[i].reg) - 1;
-    return 0;
+    return 255;
   }
 
   void APIC::eoi()
@@ -282,6 +282,16 @@ namespace hw {
   }
   void APIC::disable_irq(uint8_t irq)
   {
+    auto& overrides = ACPI::get_overrides();
+    for (auto& redir : overrides)
+    {
+      // NOTE: @bus_source is the IOAPIC number
+      if (redir.irq_source == irq)
+      {
+        IOAPIC::disable(redir.global_intr);
+        return;
+      }
+    }
     IOAPIC::disable(irq);
   }
   void APIC::setup_subs()

src/hw/pit.cpp

@@ -62,6 +62,7 @@ namespace hw {
   void PIT::disable_regular_interrupts()
   {
     oneshot(1);
+    IRQ_manager::get().disable_irq(0);
   }
 
   PIT::PIT() {}
@@ -105,8 +106,10 @@ namespace hw {
   PIT::Timer_iterator PIT::start_timer(Timer t, std::chrono::milliseconds in_msecs){
     if (in_msecs < 1ms) panic("Can't wait less than 1 ms. ");
 
-    if (current_mode_ != RATE_GEN)
+    if (current_mode_ != RATE_GEN) {
       set_mode(RATE_GEN);
+      IRQ_manager::get().enable_irq(0);
+    }
 
     if (current_freq_divider_ != millisec_interval)
       set_freq_divider(millisec_interval);
@@ -267,7 +270,7 @@ namespace hw {
 
     if (timers_.empty()) {
       debug("No more timers. Entering one-shot mode\n");
-      oneshot(1);
+      disable_regular_interrupts();
     }
 
 

src/kernel/irq_manager.cpp

@@ -156,6 +156,9 @@ void IRQ_manager::enable_irq(uint8_t irq) {
   // program IOAPIC to redirect this irq to BSP LAPIC
   hw::APIC::enable_irq(irq);
 }
+void IRQ_manager::disable_irq(uint8_t irq) {
+  hw::APIC::disable_irq(irq);
+}
 
 void IRQ_manager::subscribe(uint8_t irq, irq_delegate del) {
   if (irq >= IRQ_LINES)