Skip to content

Commit ed2f0bb

Browse files
WinterMuteWinterMute
committed
remove deprecated use of register keyword
1 parent 6ede5ab commit ed2f0bb

6 files changed

Lines changed: 90 additions & 90 deletions

File tree

‎gc/mad.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -476,8 +476,8 @@ mad_fixed_t mad_f_mul_inline(mad_fixed_t x, mad_fixed_t y)
476476

477477
# if !defined(mad_f_mul)
478478
# define mad_f_mul(x, y) \
479-
({ register mad_fixed64hi_t __hi; \
480-
register mad_fixed64lo_t __lo; \
479+
({ mad_fixed64hi_t __hi; \
480+
mad_fixed64lo_t __lo; \
481481
MAD_F_MLX(__hi, __lo, (x), (y)); \
482482
mad_f_scale64(__hi, __lo); \
483483
})

‎gc/ogc/cast.h‎

Lines changed: 34 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -53,37 +53,37 @@ static inline void CAST_Init(void)
5353

5454
static inline void CAST_SetGQR2(u32 type,s32 scale)
5555
{
56-
register u32 val = ((((((scale)<<8)&GQR_SCALE_MASK)|(type))<<16)|((((scale)<<8)&GQR_SCALE_MASK)|(type)));
56+
u32 val = ((((((scale)<<8)&GQR_SCALE_MASK)|(type))<<16)|((((scale)<<8)&GQR_SCALE_MASK)|(type)));
5757
__set_gqr(GQR2,val);
5858
}
5959

6060
static inline void CAST_SetGQR3(u32 type,s32 scale)
6161
{
62-
register u32 val = ((((((scale)<<8)&GQR_SCALE_MASK)|(type))<<16)|((((scale)<<8)&GQR_SCALE_MASK)|(type)));
62+
u32 val = ((((((scale)<<8)&GQR_SCALE_MASK)|(type))<<16)|((((scale)<<8)&GQR_SCALE_MASK)|(type)));
6363
__set_gqr(GQR3,val);
6464
}
6565

6666
static inline void CAST_SetGQR4(u32 type,s32 scale)
6767
{
68-
register u32 val = ((((((scale)<<8)&GQR_SCALE_MASK)|(type))<<16)|((((scale)<<8)&GQR_SCALE_MASK)|(type)));
68+
u32 val = ((((((scale)<<8)&GQR_SCALE_MASK)|(type))<<16)|((((scale)<<8)&GQR_SCALE_MASK)|(type)));
6969
__set_gqr(GQR4,val);
7070
}
7171

7272
static inline void CAST_SetGQR5(u32 type,s32 scale)
7373
{
74-
register u32 val = ((((((scale)<<8)&GQR_SCALE_MASK)|(type))<<16)|((((scale)<<8)&GQR_SCALE_MASK)|(type)));
74+
u32 val = ((((((scale)<<8)&GQR_SCALE_MASK)|(type))<<16)|((((scale)<<8)&GQR_SCALE_MASK)|(type)));
7575
__set_gqr(GQR5,val);
7676
}
7777

7878
static inline void CAST_SetGQR6(u32 type,s32 scale)
7979
{
80-
register u32 val = ((((((scale)<<8)&GQR_SCALE_MASK)|(type))<<16)|((((scale)<<8)&GQR_SCALE_MASK)|(type)));
80+
u32 val = ((((((scale)<<8)&GQR_SCALE_MASK)|(type))<<16)|((((scale)<<8)&GQR_SCALE_MASK)|(type)));
8181
__set_gqr(GQR6,val);
8282
}
8383

8484
static inline void CAST_SetGQR7(u32 type,s32 scale)
8585
{
86-
register u32 val = ((((((scale)<<8)&GQR_SCALE_MASK)|(type))<<16)|((((scale)<<8)&GQR_SCALE_MASK)|(type)));
86+
u32 val = ((((((scale)<<8)&GQR_SCALE_MASK)|(type))<<16)|((((scale)<<8)&GQR_SCALE_MASK)|(type)));
8787
__set_gqr(GQR7,val);
8888
}
8989

@@ -94,58 +94,58 @@ static inline void CAST_SetGQR7(u32 type,s32 scale)
9494
/* */
9595
/******************************************************************/
9696

97-
static inline f32 __castu8f32(register u8 *in)
97+
static inline f32 __castu8f32( u8 *in)
9898
{
99-
register f32 rval;
99+
f32 rval;
100100
__asm__ __volatile__ (
101101
"psq_l %[rval],0(%[in]),1,2" : [rval]"=f"(rval) : [in]"r"(in)
102102
);
103103
return rval;
104104
}
105105

106-
static inline f32 __castu16f32(register u16 *in)
106+
static inline f32 __castu16f32( u16 *in)
107107
{
108-
register f32 rval;
108+
f32 rval;
109109
__asm__ __volatile__ (
110110
"psq_l %[rval],0(%[in]),1,3" : [rval]"=f"(rval) : [in]"r"(in)
111111
);
112112
return rval;
113113
}
114114

115-
static inline f32 __casts8f32(register s8 *in)
115+
static inline f32 __casts8f32( s8 *in)
116116
{
117-
register f32 rval;
117+
f32 rval;
118118
__asm__ __volatile__ (
119119
"psq_l %[rval],0(%[in]),1,4" : [rval]"=f"(rval) : [in]"r"(in)
120120
);
121121
return rval;
122122
}
123123

124-
static inline f32 __casts16f32(register s16 *in)
124+
static inline f32 __casts16f32( s16 *in)
125125
{
126-
register f32 rval;
126+
f32 rval;
127127
__asm__ __volatile__ (
128128
"psq_l %[rval],0(%[in]),1,5" : [rval]"=f"(rval) : [in]"r"(in)
129129
);
130130
return rval;
131131
}
132132

133-
static inline void castu8f32(register u8 *in,register volatile f32 *out)
133+
static inline void castu8f32( u8 *in, volatile f32 *out)
134134
{
135135
*out = __castu8f32(in);
136136
}
137137

138-
static inline void castu16f32(register u16 *in,register volatile f32 *out)
138+
static inline void castu16f32( u16 *in, volatile f32 *out)
139139
{
140140
*out = __castu16f32(in);
141141
}
142142

143-
static inline void casts8f32(register s8 *in,register volatile f32 *out)
143+
static inline void casts8f32( s8 *in, volatile f32 *out)
144144
{
145145
*out = __casts8f32(in);
146146
}
147147

148-
static inline void casts16f32(register s16 *in,register volatile f32 *out)
148+
static inline void casts16f32( s16 *in, volatile f32 *out)
149149
{
150150
*out = __casts16f32(in);
151151
}
@@ -156,11 +156,11 @@ static inline void casts16f32(register s16 *in,register volatile f32 *out)
156156
/* */
157157
/******************************************************************/
158158

159-
static inline u8 __castf32u8(register f32 in)
159+
static inline u8 __castf32u8( f32 in)
160160
{
161161
f32 a;
162-
register u8 rval;
163-
register f32 *ptr = &a;
162+
u8 rval;
163+
f32 *ptr = &a;
164164

165165
__asm__ __volatile__ (
166166
"psq_st %[in],0(%[ptr]),1,2\n"
@@ -170,11 +170,11 @@ static inline u8 __castf32u8(register f32 in)
170170
return rval;
171171
}
172172

173-
static inline u16 __castf32u16(register f32 in)
173+
static inline u16 __castf32u16( f32 in)
174174
{
175175
f32 a;
176-
register u16 rval;
177-
register f32 *ptr = &a;
176+
u16 rval;
177+
f32 *ptr = &a;
178178

179179
__asm__ __volatile__ (
180180
"psq_st %[in],0(%[ptr]),1,3\n"
@@ -184,11 +184,11 @@ static inline u16 __castf32u16(register f32 in)
184184
return rval;
185185
}
186186

187-
static inline s8 __castf32s8(register f32 in)
187+
static inline s8 __castf32s8( f32 in)
188188
{
189189
f32 a;
190-
register s8 rval;
191-
register f32 *ptr = &a;
190+
s8 rval;
191+
f32 *ptr = &a;
192192

193193
__asm__ __volatile__ (
194194
"psq_st %[in],0(%[ptr]),1,4\n"
@@ -198,11 +198,11 @@ static inline s8 __castf32s8(register f32 in)
198198
return rval;
199199
}
200200

201-
static inline s16 __castf32s16(register f32 in)
201+
static inline s16 __castf32s16( f32 in)
202202
{
203203
f32 a;
204-
register s16 rval;
205-
register f32 *ptr = &a;
204+
s16 rval;
205+
f32 *ptr = &a;
206206

207207
__asm__ __volatile__ (
208208
"psq_st %[in],0(%[ptr]),1,5\n"
@@ -212,22 +212,22 @@ static inline s16 __castf32s16(register f32 in)
212212
return rval;
213213
}
214214

215-
static inline void castf32u8(register f32 *in,register vu8 *out)
215+
static inline void castf32u8( f32 *in, vu8 *out)
216216
{
217217
*out = __castf32u8(*in);
218218
}
219219

220-
static inline void castf32u16(register f32 *in,register vu16 *out)
220+
static inline void castf32u16( f32 *in, vu16 *out)
221221
{
222222
*out = __castf32u16(*in);
223223
}
224224

225-
static inline void castf32s8(register f32 *in,register vs8 *out)
225+
static inline void castf32s8( f32 *in, vs8 *out)
226226
{
227227
*out = __castf32s8(*in);
228228
}
229229

230-
static inline void castf32s16(register f32 *in,register vs16 *out)
230+
static inline void castf32s16( f32 *in, vs16 *out)
231231
{
232232
*out = __castf32s16(*in);
233233
}

‎gc/ogc/gu.h‎

Lines changed: 29 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -355,14 +355,14 @@ void c_guVecMultiplySR(Mtx mt,guVector *src,guVector *dst);
355355
f32 c_guVecDotProduct(guVector *a,guVector *b);
356356

357357
#ifdef GEKKO
358-
void ps_guVecAdd(register guVector *a,register guVector *b,register guVector *ab);
359-
void ps_guVecSub(register guVector *a,register guVector *b,register guVector *ab);
360-
void ps_guVecScale(register guVector *src,register guVector *dst,f32 scale);
361-
void ps_guVecNormalize(register guVector *v);
362-
void ps_guVecCross(register guVector *a,register guVector *b,register guVector *axb);
363-
void ps_guVecMultiply(register Mtx mt,register guVector *src,register guVector *dst);
364-
void ps_guVecMultiplySR(register Mtx mt,register guVector *src,register guVector *dst);
365-
f32 ps_guVecDotProduct(register guVector *a,register guVector *b);
358+
void ps_guVecAdd( guVector *a, guVector *b, guVector *ab);
359+
void ps_guVecSub( guVector *a, guVector *b, guVector *ab);
360+
void ps_guVecScale( guVector *src, guVector *dst,f32 scale);
361+
void ps_guVecNormalize( guVector *v);
362+
void ps_guVecCross( guVector *a, guVector *b, guVector *axb);
363+
void ps_guVecMultiply( Mtx mt, guVector *src, guVector *dst);
364+
void ps_guVecMultiplySR( Mtx mt, guVector *src, guVector *dst);
365+
f32 ps_guVecDotProduct( guVector *a, guVector *b);
366366
#endif //GEKKO
367367

368368
void c_guQuatAdd(guQuaternion *a,guQuaternion *b,guQuaternion *ab);
@@ -373,11 +373,11 @@ void c_guQuatInverse(guQuaternion *a,guQuaternion *d);
373373
void c_guQuatMtx(guQuaternion *a,Mtx m);
374374

375375
#ifdef GEKKO
376-
void ps_guQuatAdd(register guQuaternion *a,register guQuaternion *b,register guQuaternion *ab);
377-
void ps_guQuatSub(register guQuaternion *a,register guQuaternion *b,register guQuaternion *ab);
378-
void ps_guQuatMultiply(register guQuaternion *a,register guQuaternion *b,register guQuaternion *ab);
379-
void ps_guQuatNormalize(register guQuaternion *a,register guQuaternion *d);
380-
void ps_guQuatInverse(register guQuaternion *a,register guQuaternion *d);
376+
void ps_guQuatAdd( guQuaternion *a, guQuaternion *b, guQuaternion *ab);
377+
void ps_guQuatSub( guQuaternion *a, guQuaternion *b, guQuaternion *ab);
378+
void ps_guQuatMultiply( guQuaternion *a, guQuaternion *b, guQuaternion *ab);
379+
void ps_guQuatNormalize( guQuaternion *a, guQuaternion *d);
380+
void ps_guQuatInverse( guQuaternion *a, guQuaternion *d);
381381
#endif
382382

383383
void c_guMtxIdentity(Mtx mt);
@@ -399,22 +399,22 @@ void c_guMtxReflect(Mtx m,guVector *p,guVector *n);
399399
void c_guMtxQuat(Mtx m,guQuaternion *a);
400400

401401
#ifdef GEKKO
402-
void ps_guMtxIdentity(register Mtx mt);
403-
void ps_guMtxCopy(register Mtx src,register Mtx dst);
404-
void ps_guMtxConcat(register Mtx a,register Mtx b,register Mtx ab);
405-
void ps_guMtxTranspose(register Mtx src,register Mtx xPose);
406-
u32 ps_guMtxInverse(register Mtx src,register Mtx inv);
407-
u32 ps_guMtxInvXpose(register Mtx src,register Mtx xPose);
408-
void ps_guMtxScale(register Mtx mt,register f32 xS,register f32 yS,register f32 zS);
409-
void ps_guMtxScaleApply(register Mtx src,register Mtx dst,register f32 xS,register f32 yS,register f32 zS);
410-
void ps_guMtxApplyScale(register Mtx src,register Mtx dst,register f32 xS,register f32 yS,register f32 zS);
411-
void ps_guMtxTrans(register Mtx mt,register f32 xT,register f32 yT,register f32 zT);
412-
void ps_guMtxTransApply(register Mtx src,register Mtx dst,register f32 xT,register f32 yT,register f32 zT);
413-
void ps_guMtxApplyTrans(register Mtx src,register Mtx dst,register f32 xT,register f32 yT,register f32 zT);
414-
void ps_guMtxRotRad(register Mtx mt,register const char axis,register f32 rad);
415-
void ps_guMtxRotTrig(register Mtx mt,register const char axis,register f32 sinA,register f32 cosA);
416-
void ps_guMtxRotAxisRad(register Mtx mt,register guVector *axis,register f32 tmp0);
417-
void ps_guMtxReflect(register Mtx m,register guVector *p,register guVector *n);
402+
void ps_guMtxIdentity( Mtx mt);
403+
void ps_guMtxCopy( Mtx src, Mtx dst);
404+
void ps_guMtxConcat( Mtx a, Mtx b, Mtx ab);
405+
void ps_guMtxTranspose( Mtx src, Mtx xPose);
406+
u32 ps_guMtxInverse( Mtx src, Mtx inv);
407+
u32 ps_guMtxInvXpose( Mtx src, Mtx xPose);
408+
void ps_guMtxScale( Mtx mt, f32 xS, f32 yS, f32 zS);
409+
void ps_guMtxScaleApply( Mtx src, Mtx dst, f32 xS, f32 yS, f32 zS);
410+
void ps_guMtxApplyScale( Mtx src, Mtx dst, f32 xS, f32 yS, f32 zS);
411+
void ps_guMtxTrans( Mtx mt, f32 xT, f32 yT, f32 zT);
412+
void ps_guMtxTransApply( Mtx src, Mtx dst, f32 xT, f32 yT, f32 zT);
413+
void ps_guMtxApplyTrans( Mtx src, Mtx dst, f32 xT, f32 yT, f32 zT);
414+
void ps_guMtxRotRad( Mtx mt, const char axis, f32 rad);
415+
void ps_guMtxRotTrig( Mtx mt, const char axis, f32 sinA, f32 cosA);
416+
void ps_guMtxRotAxisRad( Mtx mt, guVector *axis, f32 tmp0);
417+
void ps_guMtxReflect( Mtx m, guVector *p, guVector *n);
418418
#endif //GEKKO
419419

420420
void guMtx44Identity(Mtx44 mt);

‎gc/ogc/machine/processor.h‎

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -22,24 +22,24 @@
2222
} \
2323
})
2424

25-
#define mfpvr() ({register u32 _rval; \
25+
#define mfpvr() ({u32 _rval; \
2626
__asm__ __volatile__ ("mfpvr %0" : "=r"(_rval)); _rval;})
2727

28-
#define mfdcr(_rn) ({register u32 _rval; \
28+
#define mfdcr(_rn) ({u32 _rval; \
2929
__asm__ __volatile__ ("mfdcr %0," __stringify(_rn) \
3030
: "=r" (_rval)); _rval;})
3131
#define mtdcr(rn, val) __asm__ __volatile__ ("mtdcr " __stringify(rn) ",%0" : : "r" (val))
3232

33-
#define mfmsr() ({register u32 _rval; \
33+
#define mfmsr() ({u32 _rval; \
3434
__asm__ __volatile__ ("mfmsr %0" : "=r" (_rval)); _rval;})
3535
#define mtmsr(val) __asm__ __volatile__ ("mtmsr %0" : : "r" (val))
3636

37-
#define mfdec() ({register u32 _rval; \
37+
#define mfdec() ({u32 _rval; \
3838
__asm__ __volatile__ ("mfdec %0" : "=r" (_rval)); _rval;})
3939
#define mtdec(_val) __asm__ __volatile__ ("mtdec %0" : : "r" (_val))
4040

4141
#define mfspr(_rn) \
42-
({ register u32 _rval = 0; \
42+
({ u32 _rval = 0; \
4343
__asm__ __volatile__ ("mfspr %0," __stringify(_rn) \
4444
: "=r" (_rval));\
4545
_rval; \
@@ -74,12 +74,12 @@
7474
#define mthid4(_val) mtspr(HID4,_val)
7575

7676
#define __lhbrx(base,index) \
77-
({ register u16 res; \
77+
({ u16 res; \
7878
__asm__ volatile ("lhbrx %0,%1,%2" : "=r"(res) : "b%"(index), "r"(base) : "memory"); \
7979
res; })
8080

8181
#define __lwbrx(base,index) \
82-
({ register u32 res; \
82+
({ u32 res; \
8383
__asm__ volatile ("lwbrx %0,%1,%2" : "=r"(res) : "b%"(index), "r"(base) : "memory"); \
8484
res; })
8585

@@ -89,7 +89,7 @@
8989
#define __stwbrx(base,index,value) \
9090
__asm__ volatile ("stwbrx %0,%1,%2" : : "r"(value), "b%"(index), "r"(base) : "memory")
9191

92-
#define cntlzw(_val) ({register u32 _rval; \
92+
#define cntlzw(_val) ({u32 _rval; \
9393
__asm__ __volatile__ ("cntlzw %0, %1" : "=r"((_rval)) : "r"((_val))); _rval;})
9494

9595
#define _CPU_MSR_GET( _msr_value ) \
@@ -103,7 +103,7 @@
103103

104104
#define _CPU_ISR_Enable() \
105105
do { \
106-
register u32 _val = 0; \
106+
u32 _val = 0; \
107107
__asm__ __volatile__ ( \
108108
"mfmsr %0\n" \
109109
"ori %0,%0,0x8000\n" \
@@ -115,7 +115,7 @@
115115

116116
#define _CPU_ISR_Disable( _isr_cookie ) \
117117
do { \
118-
register u32 _disable_mask = 0; \
118+
u32 _disable_mask = 0; \
119119
_isr_cookie = 0; \
120120
__asm__ __volatile__ ( \
121121
"mfmsr %0\n" \
@@ -130,7 +130,7 @@
130130

131131
#define _CPU_ISR_Restore( _isr_cookie ) \
132132
do { \
133-
register u32 _enable_mask = 0; \
133+
u32 _enable_mask = 0; \
134134
__asm__ __volatile__ ( \
135135
"cmpwi %0,0\n" \
136136
"beq 1f\n" \
@@ -146,7 +146,7 @@
146146

147147
#define _CPU_ISR_Flash( _isr_cookie ) \
148148
do { \
149-
register u32 _flash_mask = 0; \
149+
u32 _flash_mask = 0; \
150150
__asm__ __volatile__ ( \
151151
"cmpwi %0,0\n" \
152152
"beq 1f\n" \
@@ -163,13 +163,13 @@
163163
} while (0)
164164

165165
#define _CPU_FPR_Enable() \
166-
{ register u32 _val = 0; \
166+
{ u32 _val = 0; \
167167
__asm__ __volatile__ ("mfmsr %0; ori %0,%0,0x2000; mtmsr %0" : \
168168
"=&r" (_val) : "0" (_val));\
169169
}
170170

171171
#define _CPU_FPR_Disable() \
172-
{ register u32 _val = 0; \
172+
{ u32 _val = 0; \
173173
__asm__ __volatile__ ("mfmsr %0; rlwinm %0,%0,0,19,17; mtmsr %0" : \
174174
"=&r" (_val) : "0" (_val));\
175175
}

0 commit comments

Comments
 (0)