@@ -146,70 +146,84 @@ Following is a brief explanation of layers shown in the diagram:
146146
147147.. ifconfig :: CONFIG_part_family in ('AM64X_family','J7_family')
148148
149- .. rubric :: **RC Device Configuration**
150- :name: rc-device-configuration
149+ .. rubric :: **RC Device Configuration**
150+ :name: rc-device-configuration
151151
152- .. rubric :: *DTS Modification*
153- :name: rc-dts-modification
152+ .. rubric :: *DTS Modification*
153+ :name: rc-dts-modification
154154
155- The default dts for |__PART_FAMILY_DEVICE_NAMES__ | is configured to be used in
156- root complex mode.
155+ The default dts for |__PART_FAMILY_DEVICE_NAMES__ | is configured to be used in
156+ root complex mode.
157157
158- .. rubric :: *Linux Driver Configuration*
159- :name: linux-driver-configuration
158+ .. rubric :: *Linux Driver Configuration*
159+ :name: linux-driver-configuration
160160
161- The following config options have to be enabled in order to configure the
162- PCI controller to be used in Root Complex mode.
161+ The following config options have to be enabled in order to configure the
162+ PCI controller to be used in Root Complex mode.
163163
164- ::
164+ ::
165+
166+ CONFIG_SOCIONEXT_SYNQUACER_PREITS=y
167+ CONFIG_PCI=y
168+ CONFIG_PCI_MSI=y
169+ CONFIG_PCI_J721E=y
170+ CONFIG_PCIE_CADENCE=y
171+ CONFIG_PCIE_CADENCE_HOST=y
172+
173+ .. rubric :: **Compliance Mode**
174+ :name: compliance-mode
175+
176+ In RC mode of operation, the Endpoint device can be forced to enter
177+ Compliance Mode for PCIe compliance testing by setting the "EC" bit
178+ in the LINK_CTRL_STATUS_2 register of the respective PCIe RC instance.
179+ Setting "EC" to 1 initiates a hot reset thereby forcing the Endpoint
180+ device into Compliance mode. The "EC" bit can be set from command-line
181+ by using devmem2 utility as follows:
182+
183+ devmem2 <address> w <value>
184+
185+ where <address> is the address of LINK_CTRL_STATUS_2 register and
186+ <value> is the resulting value to be written with "EC" bit of the
187+ register set.
165188
166- CONFIG_SOCIONEXT_SYNQUACER_PREITS=y
167- CONFIG_PCI=y
168- CONFIG_PCI_MSI=y
169- CONFIG_PCI_J721E=y
170- CONFIG_PCIE_CADENCE=y
171- CONFIG_PCIE_CADENCE_HOST=y
189+ .. rubric :: **64-Bit Address Space with 4 GB Size**
190+ :name: 64-bit-address-space
172191
173- .. rubric :: **Compliance Mode**
174- :name: compliance-mode
192+ The PCIe Controller support for 64-Bit addressing in the System's
193+ Address Space with 4 GB Size is enabled in the device-tree.
194+ The 4 GB region is split as:
175195
176- In RC mode of operation, the Endpoint device can be forced to enter
177- Compliance Mode for PCIe compliance testing by setting the "EC" bit
178- in the LINK_CTRL_STATUS_2 register of the respective PCIe RC instance.
179- Setting "EC" to 1 initiates a hot reset thereby forcing the Endpoint
180- device into Compliance mode. The "EC" bit can be set from command-line
181- by using devmem2 utility as follows:
196+ 1. 4 KB ECAM region for Configuration Accesses
197+ 2. 1 MB IO region
198+ 3. Remaining region (4 GB - 1 MB - 4 KB) as 32-bit Non-Prefetchable MEM
182199
183- devmem2 <address> w <value>
200+ .. note ::
184201
185- where <address> is the address of LINK_CTRL_STATUS_2 register and
186- <value> is the resulting value to be written with "EC" bit of the
187- register set.
202+ If the root complex is connected to an endpoint with virtual functions,
203+ and the kernel panics during enumeration, add `` pci=realloc `` to `` optargs ``
204+ at the U-Boot prompt using the following command:
188205
189- .. rubric :: **64-Bit Address Space with 4 GB Size**
190- :name: 64-bit-address-space
206+ .. code-block :: console
191207
192- The PCIe Controller support for 64-Bit addressing in the System's
193- Address Space with 4 GB Size is enabled in the device-tree.
194- The 4 GB region is split as:
208+ setenv optargs 'pci=realloc'
195209
196- 1. 4 KB ECAM region for Configuration Accesses
197- 2. 1 MB IO region
198- 3. Remaining region (4 GB - 1 MB - 4 KB) as 32-bit Non-Prefetchable MEM
210+ The `` pci=realloc `` parameter instructs the Linux kernel to reallocate PCI
211+ bridge resources. This helps resolve resource conflicts during enumeration
212+ of PCIe devices by allowing the kernel to reassign memory and I/O addresses.
199213
200- .. rubric :: **Testing Details**
201- :name: testing-details
214+ .. rubric :: **Testing Details**
215+ :name: testing-details
202216
203- The RC should enumerate any off-the-shelf PCIe cards. It has been tested
204- with Ethernet cards, NVMe cards, PCIe USB card, PCIe WiFi card, PCIe SATA
205- card and also to |__PART_FAMILY_DEVICE_NAMES__ | in loopback mode.
217+ The RC should enumerate any off-the-shelf PCIe cards. It has been tested
218+ with Ethernet cards, NVMe cards, PCIe USB card, PCIe WiFi card, PCIe SATA
219+ card and also to |__PART_FAMILY_DEVICE_NAMES__ | in loopback mode.
206220
207- In order to see if the connected card is detected, lspci utility should be
208- used. Different utilities can be used depending on the cards.
221+ In order to see if the connected card is detected, lspci utility should be
222+ used. Different utilities can be used depending on the cards.
209223
210- Following are the outputs for some of them:
224+ Following are the outputs for some of them:
211225
212- - Loopback mode (|__PART_FAMILY_DEVICE_NAMES__ | EVM to |__PART_FAMILY_DEVICE_NAMES__ | EVM)
226+ - Loopback mode (|__PART_FAMILY_DEVICE_NAMES__ | EVM to |__PART_FAMILY_DEVICE_NAMES__ | EVM)
213227
214228 Two |__PART_FAMILY_DEVICE_NAMES__ | EVMs can be connected in loopback mode by following
215229 the steps explained in
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