@@ -39,16 +39,10 @@ struct stm32_exti_bank {
3939
4040#define UNDEF_REG ~0
4141
42- struct stm32_desc_irq {
43- u32 exti ;
44- u32 irq_parent ;
45- };
46-
4742struct stm32_exti_drv_data {
4843 const struct stm32_exti_bank * * exti_banks ;
49- const struct stm32_desc_irq * desc_irqs ;
44+ const u8 * desc_irqs ;
5045 u32 bank_nr ;
51- u32 irq_nr ;
5246};
5347
5448struct stm32_exti_chip_data {
@@ -176,126 +170,114 @@ static const struct stm32_exti_bank *stm32mp1_exti_banks[] = {
176170static struct irq_chip stm32_exti_h_chip ;
177171static struct irq_chip stm32_exti_h_chip_direct ;
178172
179- static const struct stm32_desc_irq stm32mp1_desc_irq [] = {
180- { .exti = 0 , .irq_parent = 6 },
181- { .exti = 1 , .irq_parent = 7 },
182- { .exti = 2 , .irq_parent = 8 },
183- { .exti = 3 , .irq_parent = 9 },
184- { .exti = 4 , .irq_parent = 10 },
185- { .exti = 5 , .irq_parent = 23 },
186- { .exti = 6 , .irq_parent = 64 },
187- { .exti = 7 , .irq_parent = 65 },
188- { .exti = 8 , .irq_parent = 66 },
189- { .exti = 9 , .irq_parent = 67 },
190- { .exti = 10 , .irq_parent = 40 },
191- { .exti = 11 , .irq_parent = 42 },
192- { .exti = 12 , .irq_parent = 76 },
193- { .exti = 13 , .irq_parent = 77 },
194- { .exti = 14 , .irq_parent = 121 },
195- { .exti = 15 , .irq_parent = 127 },
196- { .exti = 16 , .irq_parent = 1 },
197- { .exti = 19 , .irq_parent = 3 },
198- { .exti = 21 , .irq_parent = 31 },
199- { .exti = 22 , .irq_parent = 33 },
200- { .exti = 23 , .irq_parent = 72 },
201- { .exti = 24 , .irq_parent = 95 },
202- { .exti = 25 , .irq_parent = 107 },
203- { .exti = 26 , .irq_parent = 37 },
204- { .exti = 27 , .irq_parent = 38 },
205- { .exti = 28 , .irq_parent = 39 },
206- { .exti = 29 , .irq_parent = 71 },
207- { .exti = 30 , .irq_parent = 52 },
208- { .exti = 31 , .irq_parent = 53 },
209- { .exti = 32 , .irq_parent = 82 },
210- { .exti = 33 , .irq_parent = 83 },
211- { .exti = 47 , .irq_parent = 93 },
212- { .exti = 48 , .irq_parent = 138 },
213- { .exti = 50 , .irq_parent = 139 },
214- { .exti = 52 , .irq_parent = 140 },
215- { .exti = 53 , .irq_parent = 141 },
216- { .exti = 54 , .irq_parent = 135 },
217- { .exti = 61 , .irq_parent = 100 },
218- { .exti = 65 , .irq_parent = 144 },
219- { .exti = 68 , .irq_parent = 143 },
220- { .exti = 70 , .irq_parent = 62 },
221- { .exti = 73 , .irq_parent = 129 },
173+ #define EXTI_INVALID_IRQ U8_MAX
174+ #define STM32MP1_DESC_IRQ_SIZE (ARRAY_SIZE(stm32mp1_exti_banks) * IRQS_PER_BANK)
175+
176+ static const u8 stm32mp1_desc_irq [] = {
177+ /* default value */
178+ [0 ... (STM32MP1_DESC_IRQ_SIZE - 1 )] = EXTI_INVALID_IRQ ,
179+
180+ [0 ] = 6 ,
181+ [1 ] = 7 ,
182+ [2 ] = 8 ,
183+ [3 ] = 9 ,
184+ [4 ] = 10 ,
185+ [5 ] = 23 ,
186+ [6 ] = 64 ,
187+ [7 ] = 65 ,
188+ [8 ] = 66 ,
189+ [9 ] = 67 ,
190+ [10 ] = 40 ,
191+ [11 ] = 42 ,
192+ [12 ] = 76 ,
193+ [13 ] = 77 ,
194+ [14 ] = 121 ,
195+ [15 ] = 127 ,
196+ [16 ] = 1 ,
197+ [19 ] = 3 ,
198+ [21 ] = 31 ,
199+ [22 ] = 33 ,
200+ [23 ] = 72 ,
201+ [24 ] = 95 ,
202+ [25 ] = 107 ,
203+ [26 ] = 37 ,
204+ [27 ] = 38 ,
205+ [28 ] = 39 ,
206+ [29 ] = 71 ,
207+ [30 ] = 52 ,
208+ [31 ] = 53 ,
209+ [32 ] = 82 ,
210+ [33 ] = 83 ,
211+ [47 ] = 93 ,
212+ [48 ] = 138 ,
213+ [50 ] = 139 ,
214+ [52 ] = 140 ,
215+ [53 ] = 141 ,
216+ [54 ] = 135 ,
217+ [61 ] = 100 ,
218+ [65 ] = 144 ,
219+ [68 ] = 143 ,
220+ [70 ] = 62 ,
221+ [73 ] = 129 ,
222222};
223223
224- static const struct stm32_desc_irq stm32mp13_desc_irq [] = {
225- { .exti = 0 , .irq_parent = 6 },
226- { .exti = 1 , .irq_parent = 7 },
227- { .exti = 2 , .irq_parent = 8 },
228- { .exti = 3 , .irq_parent = 9 },
229- { .exti = 4 , .irq_parent = 10 },
230- { .exti = 5 , .irq_parent = 24 },
231- { .exti = 6 , .irq_parent = 65 },
232- { .exti = 7 , .irq_parent = 66 },
233- { .exti = 8 , .irq_parent = 67 },
234- { .exti = 9 , .irq_parent = 68 },
235- { .exti = 10 , .irq_parent = 41 },
236- { .exti = 11 , .irq_parent = 43 },
237- { .exti = 12 , .irq_parent = 77 },
238- { .exti = 13 , .irq_parent = 78 },
239- { .exti = 14 , .irq_parent = 106 },
240- { .exti = 15 , .irq_parent = 109 },
241- { .exti = 16 , .irq_parent = 1 },
242- { .exti = 19 , .irq_parent = 3 },
243- { .exti = 21 , .irq_parent = 32 },
244- { .exti = 22 , .irq_parent = 34 },
245- { .exti = 23 , .irq_parent = 73 },
246- { .exti = 24 , .irq_parent = 93 },
247- { .exti = 25 , .irq_parent = 114 },
248- { .exti = 26 , .irq_parent = 38 },
249- { .exti = 27 , .irq_parent = 39 },
250- { .exti = 28 , .irq_parent = 40 },
251- { .exti = 29 , .irq_parent = 72 },
252- { .exti = 30 , .irq_parent = 53 },
253- { .exti = 31 , .irq_parent = 54 },
254- { .exti = 32 , .irq_parent = 83 },
255- { .exti = 33 , .irq_parent = 84 },
256- { .exti = 44 , .irq_parent = 96 },
257- { .exti = 47 , .irq_parent = 92 },
258- { .exti = 48 , .irq_parent = 116 },
259- { .exti = 50 , .irq_parent = 117 },
260- { .exti = 52 , .irq_parent = 118 },
261- { .exti = 53 , .irq_parent = 119 },
262- { .exti = 68 , .irq_parent = 63 },
263- { .exti = 70 , .irq_parent = 98 },
224+ static const u8 stm32mp13_desc_irq [] = {
225+ /* default value */
226+ [0 ... (STM32MP1_DESC_IRQ_SIZE - 1 )] = EXTI_INVALID_IRQ ,
227+
228+ [0 ] = 6 ,
229+ [1 ] = 7 ,
230+ [2 ] = 8 ,
231+ [3 ] = 9 ,
232+ [4 ] = 10 ,
233+ [5 ] = 24 ,
234+ [6 ] = 65 ,
235+ [7 ] = 66 ,
236+ [8 ] = 67 ,
237+ [9 ] = 68 ,
238+ [10 ] = 41 ,
239+ [11 ] = 43 ,
240+ [12 ] = 77 ,
241+ [13 ] = 78 ,
242+ [14 ] = 106 ,
243+ [15 ] = 109 ,
244+ [16 ] = 1 ,
245+ [19 ] = 3 ,
246+ [21 ] = 32 ,
247+ [22 ] = 34 ,
248+ [23 ] = 73 ,
249+ [24 ] = 93 ,
250+ [25 ] = 114 ,
251+ [26 ] = 38 ,
252+ [27 ] = 39 ,
253+ [28 ] = 40 ,
254+ [29 ] = 72 ,
255+ [30 ] = 53 ,
256+ [31 ] = 54 ,
257+ [32 ] = 83 ,
258+ [33 ] = 84 ,
259+ [44 ] = 96 ,
260+ [47 ] = 92 ,
261+ [48 ] = 116 ,
262+ [50 ] = 117 ,
263+ [52 ] = 118 ,
264+ [53 ] = 119 ,
265+ [68 ] = 63 ,
266+ [70 ] = 98 ,
264267};
265268
266269static const struct stm32_exti_drv_data stm32mp1_drv_data = {
267270 .exti_banks = stm32mp1_exti_banks ,
268271 .bank_nr = ARRAY_SIZE (stm32mp1_exti_banks ),
269272 .desc_irqs = stm32mp1_desc_irq ,
270- .irq_nr = ARRAY_SIZE (stm32mp1_desc_irq ),
271273};
272274
273275static const struct stm32_exti_drv_data stm32mp13_drv_data = {
274276 .exti_banks = stm32mp1_exti_banks ,
275277 .bank_nr = ARRAY_SIZE (stm32mp1_exti_banks ),
276278 .desc_irqs = stm32mp13_desc_irq ,
277- .irq_nr = ARRAY_SIZE (stm32mp13_desc_irq ),
278279};
279280
280- static const struct
281- stm32_desc_irq * stm32_exti_get_desc (const struct stm32_exti_drv_data * drv_data ,
282- irq_hw_number_t hwirq )
283- {
284- const struct stm32_desc_irq * desc = NULL ;
285- int i ;
286-
287- if (!drv_data -> desc_irqs )
288- return NULL ;
289-
290- for (i = 0 ; i < drv_data -> irq_nr ; i ++ ) {
291- desc = & drv_data -> desc_irqs [i ];
292- if (desc -> exti == hwirq )
293- break ;
294- }
295-
296- return desc ;
297- }
298-
299281static unsigned long stm32_exti_pending (struct irq_chip_generic * gc )
300282{
301283 struct stm32_exti_chip_data * chip_data = gc -> private ;
@@ -713,7 +695,7 @@ static int stm32_exti_h_domain_alloc(struct irq_domain *dm,
713695{
714696 struct stm32_exti_host_data * host_data = dm -> host_data ;
715697 struct stm32_exti_chip_data * chip_data ;
716- const struct stm32_desc_irq * desc ;
698+ u8 desc_irq ;
717699 struct irq_fwspec * fwspec = data ;
718700 struct irq_fwspec p_fwspec ;
719701 irq_hw_number_t hwirq ;
@@ -728,21 +710,21 @@ static int stm32_exti_h_domain_alloc(struct irq_domain *dm,
728710 bank = hwirq / IRQS_PER_BANK ;
729711 chip_data = & host_data -> chips_data [bank ];
730712
731-
732- desc = stm32_exti_get_desc (host_data -> drv_data , hwirq );
733- if (!desc )
734- return - EINVAL ;
735-
736713 event_trg = readl_relaxed (host_data -> base + chip_data -> reg_bank -> trg_ofst );
737714 chip = (event_trg & BIT (hwirq % IRQS_PER_BANK )) ?
738715 & stm32_exti_h_chip : & stm32_exti_h_chip_direct ;
739716
740717 irq_domain_set_hwirq_and_chip (dm , virq , hwirq , chip , chip_data );
741- if (desc -> irq_parent ) {
718+
719+ if (!host_data -> drv_data || !host_data -> drv_data -> desc_irqs )
720+ return - EINVAL ;
721+
722+ desc_irq = host_data -> drv_data -> desc_irqs [hwirq ];
723+ if (desc_irq != EXTI_INVALID_IRQ ) {
742724 p_fwspec .fwnode = dm -> parent -> fwnode ;
743725 p_fwspec .param_count = 3 ;
744726 p_fwspec .param [0 ] = GIC_SPI ;
745- p_fwspec .param [1 ] = desc -> irq_parent ;
727+ p_fwspec .param [1 ] = desc_irq ;
746728 p_fwspec .param [2 ] = IRQ_TYPE_LEVEL_HIGH ;
747729
748730 return irq_domain_alloc_irqs_parent (dm , virq , 1 , & p_fwspec );
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