Skip to content

Commit be6bfb2

Browse files
ricardonrafaeljw
authored andcommitted
thermal: intel: intel_tcc_cooling: Use a model-specific bitmask for TCC offset
The TCC offset field in the register MSR_TEMPERATURE_TARGET is not architectural. The TCC library provides a model-specific bitmask. Use it to determine the maximum TCC offset. Suggested-by: Zhang Rui <rui.zhang@intel.com> Reviewed-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> Link: https://patch.msgid.link/20240614211606.5896-3-ricardo.neri-calderon@linux.intel.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
1 parent 6ae0092 commit be6bfb2

1 file changed

Lines changed: 1 addition & 1 deletion

File tree

drivers/thermal/intel/intel_tcc_cooling.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ static struct thermal_cooling_device *tcc_cdev;
2020
static int tcc_get_max_state(struct thermal_cooling_device *cdev, unsigned long
2121
*state)
2222
{
23-
*state = 0x3f;
23+
*state = intel_tcc_get_offset_mask();
2424
return 0;
2525
}
2626

0 commit comments

Comments
 (0)