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riscv: dts: microchip: update pcie reg properties to new format
The existing PolarFire SoC devicetrees all use root port instance 1, update the reg properties in PCIe nodes to use the new format that specifies the instance in use. Failing to do so would still work but produces warnings: mpfs-icicle-kit.dtb: pcie@3000000000: reg: [[48, 0, 0, 134217728], [0, 1124073472, 0, 65536]] is too short mpfs-icicle-kit.dtb: pcie@3000000000: reg-names: ['cfg', 'apb'] is too short Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- CC: Conor Dooley <conor@kernel.org> CC: Daire McNamara <daire.mcnamara@microchip.com> CC: valentina.fernandezalanis@microchip.com CC: Rob Herring <robh@kernel.org> CC: Krzysztof Kozlowski <krzk+dt@kernel.org> CC: linux-riscv@lists.infradead.org CC: devicetree@vger.kernel.org CC: linux-kernel@vger.kernel.org
1 parent 2014c95 commit 9b181f4

3 files changed

Lines changed: 9 additions & 6 deletions

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arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,9 @@
3232
#interrupt-cells = <0x1>;
3333
#size-cells = <0x2>;
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device_type = "pci";
35-
reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
36-
reg-names = "cfg", "apb";
35+
reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43008000 0x0 0x2000>,
36+
<0x0 0x4300a000 0x0 0x2000>;
37+
reg-names = "cfg", "bridge", "ctrl";
3738
bus-range = <0x0 0x7f>;
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interrupt-parent = <&plic>;
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interrupts = <119>;

arch/riscv/boot/dts/microchip/mpfs-m100pfs-fabric.dtsi

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,9 @@
2020
#interrupt-cells = <0x1>;
2121
#size-cells = <0x2>;
2222
device_type = "pci";
23-
reg = <0x20 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
24-
reg-names = "cfg", "apb";
23+
reg = <0x20 0x0 0x0 0x8000000>, <0x0 0x43008000 0x0 0x2000>,
24+
<0x0 0x4300a000 0x0 0x2000>;
25+
reg-names = "cfg", "bridge", "ctrl";
2526
bus-range = <0x0 0x7f>;
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interrupt-parent = <&plic>;
2728
interrupts = <119>;

arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,9 @@
2020
#interrupt-cells = <0x1>;
2121
#size-cells = <0x2>;
2222
device_type = "pci";
23-
reg = <0x20 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>;
24-
reg-names = "cfg", "apb";
23+
reg = <0x20 0x0 0x0 0x8000000>, <0x0 0x43008000 0x0 0x2000>,
24+
<0x0 0x4300a000 0x0 0x2000>;
25+
reg-names = "cfg", "bridge", "ctrl";
2526
bus-range = <0x0 0x7f>;
2627
interrupt-parent = <&plic>;
2728
interrupts = <119>;

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