@@ -1823,6 +1823,7 @@ static bool i9xx_has_pps(struct drm_i915_private *dev_priv)
18231823
18241824void i9xx_enable_pll (const struct intel_crtc_state * crtc_state )
18251825{
1826+ struct intel_display * display = to_intel_display (crtc_state );
18261827 struct intel_crtc * crtc = to_intel_crtc (crtc_state -> uapi .crtc );
18271828 struct drm_i915_private * dev_priv = to_i915 (crtc -> base .dev );
18281829 const struct i9xx_dpll_hw_state * hw_state = & crtc_state -> dpll_hw_state .i9xx ;
@@ -1833,7 +1834,7 @@ void i9xx_enable_pll(const struct intel_crtc_state *crtc_state)
18331834
18341835 /* PLL is protected by panel, make sure we can write it */
18351836 if (i9xx_has_pps (dev_priv ))
1836- assert_pps_unlocked (dev_priv , pipe );
1837+ assert_pps_unlocked (display , pipe );
18371838
18381839 intel_de_write (dev_priv , FP0 (pipe ), hw_state -> fp0 );
18391840 intel_de_write (dev_priv , FP1 (pipe ), hw_state -> fp1 );
@@ -2004,6 +2005,7 @@ static void _vlv_enable_pll(const struct intel_crtc_state *crtc_state)
20042005
20052006void vlv_enable_pll (const struct intel_crtc_state * crtc_state )
20062007{
2008+ struct intel_display * display = to_intel_display (crtc_state );
20072009 struct intel_crtc * crtc = to_intel_crtc (crtc_state -> uapi .crtc );
20082010 struct drm_i915_private * dev_priv = to_i915 (crtc -> base .dev );
20092011 const struct i9xx_dpll_hw_state * hw_state = & crtc_state -> dpll_hw_state .i9xx ;
@@ -2012,7 +2014,7 @@ void vlv_enable_pll(const struct intel_crtc_state *crtc_state)
20122014 assert_transcoder_disabled (dev_priv , crtc_state -> cpu_transcoder );
20132015
20142016 /* PLL is protected by panel, make sure we can write it */
2015- assert_pps_unlocked (dev_priv , pipe );
2017+ assert_pps_unlocked (display , pipe );
20162018
20172019 /* Enable Refclk */
20182020 intel_de_write (dev_priv , DPLL (dev_priv , pipe ),
@@ -2150,6 +2152,7 @@ static void _chv_enable_pll(const struct intel_crtc_state *crtc_state)
21502152
21512153void chv_enable_pll (const struct intel_crtc_state * crtc_state )
21522154{
2155+ struct intel_display * display = to_intel_display (crtc_state );
21532156 struct intel_crtc * crtc = to_intel_crtc (crtc_state -> uapi .crtc );
21542157 struct drm_i915_private * dev_priv = to_i915 (crtc -> base .dev );
21552158 const struct i9xx_dpll_hw_state * hw_state = & crtc_state -> dpll_hw_state .i9xx ;
@@ -2158,7 +2161,7 @@ void chv_enable_pll(const struct intel_crtc_state *crtc_state)
21582161 assert_transcoder_disabled (dev_priv , crtc_state -> cpu_transcoder );
21592162
21602163 /* PLL is protected by panel, make sure we can write it */
2161- assert_pps_unlocked (dev_priv , pipe );
2164+ assert_pps_unlocked (display , pipe );
21622165
21632166 /* Enable Refclk and SSC */
21642167 intel_de_write (dev_priv , DPLL (dev_priv , pipe ),
0 commit comments