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robherringgclement
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arm64: dts: marvell: Move arch timer and pmu nodes to top-level
The Arm arch timer and PMU are not memory-mapped peripherals, and therefore should not be under a "simple-bus" node. Move them to the top-level like other platforms. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
1 parent 814ae20 commit 7c5cf1b

2 files changed

Lines changed: 24 additions & 23 deletions

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arch/arm64/boot/dts/marvell/armada-ap80x.dtsi

Lines changed: 15 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,21 @@
4848
};
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};
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51+
timer {
52+
compatible = "arm,armv8-timer";
53+
interrupt-parent = <&gic>;
54+
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
55+
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
56+
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
57+
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
58+
};
59+
60+
pmu {
61+
compatible = "arm,cortex-a72-pmu";
62+
interrupt-parent = <&pic>;
63+
interrupts = <17>;
64+
};
65+
5166
AP_NAME {
5267
#address-cells = <2>;
5368
#size-cells = <2>;
@@ -122,20 +137,6 @@
122137
};
123138
};
124139

125-
timer {
126-
compatible = "arm,armv8-timer";
127-
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
128-
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
129-
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
130-
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
131-
};
132-
133-
pmu {
134-
compatible = "arm,cortex-a72-pmu";
135-
interrupt-parent = <&pic>;
136-
interrupts = <17>;
137-
};
138-
139140
odmi: odmi@300000 {
140141
compatible = "marvell,odmi-controller";
141142
msi-controller;

arch/arm64/boot/dts/marvell/armada-ap810-ap0.dtsi

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@
1212
/ {
1313
#address-cells = <2>;
1414
#size-cells = <2>;
15+
interrupt-parent = <&gic>;
1516

1617
aliases {
1718
serial0 = &uart0_ap0;
@@ -23,11 +24,18 @@
2324
method = "smc";
2425
};
2526

27+
timer {
28+
compatible = "arm,armv8-timer";
29+
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
30+
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
31+
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
32+
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
33+
};
34+
2635
ap810-ap0 {
2736
#address-cells = <2>;
2837
#size-cells = <2>;
2938
compatible = "simple-bus";
30-
interrupt-parent = <&gic>;
3139
ranges;
3240

3341
config-space@e8000000 {
@@ -60,14 +68,6 @@
6068
};
6169
};
6270

63-
timer {
64-
compatible = "arm,armv8-timer";
65-
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
66-
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
67-
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
68-
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
69-
};
70-
7171
xor@400000 {
7272
compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
7373
reg = <0x400000 0x1000>,

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