Commit 65e8b99
riscv: dts: starfive: jh7110: pciephy0 USB 3.0 configuration registers
StarFive JH7110 contains a Cadence USB2.0+USB3.0 controller IP block that
may exclusively use pciephy0 for USB3.0 connectivity. Add the register
offsets for the driver to enable/disable USB3.0 on pciephy0.
Signed-off-by: E Shattow <e@freeshell.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>1 parent 57b5369 commit 65e8b99
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