drivers: perf: added capabilities for legacy PMU

vdsh-sc · palmer-dabbelt · commit 65730fe8f4fb · 2024-02-27T12:55:35.000-08:00
Added the PERF_PMU_CAP_NO_INTERRUPT flag because the legacy pmu driver does not provide sampling capabilities Added the PERF_PMU_CAP_NO_EXCLUDE flag because the legacy pmu driver does not provide the ability to disable counter incrementation in different privilege modes Suggested-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Vadim Shakirov <vadim.shakirov@syntacore.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Fixes: 9b3e150 ("RISC-V: Add a simple platform driver for RISC-V legacy perf") Link: https://lore.kernel.org/r/20240227170002.188671-2-vadim.shakirov@syntacore.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
@@ -117,6 +117,8 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
 	pmu->event_mapped = pmu_legacy_event_mapped;
 	pmu->event_unmapped = pmu_legacy_event_unmapped;
 	pmu->csr_index = pmu_legacy_csr_index;
+	pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
+	pmu->pmu.capabilities |= PERF_PMU_CAP_NO_EXCLUDE;
 
 	perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW);
 }

Original file line number	Diff line number	Diff line change
`@@ -117,6 +117,8 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)`
`117`	`117`	`pmu->event_mapped = pmu_legacy_event_mapped;`
`118`	`118`	`pmu->event_unmapped = pmu_legacy_event_unmapped;`
`119`	`119`	`pmu->csr_index = pmu_legacy_csr_index;`
	`120`	`+ pmu->pmu.capabilities \|= PERF_PMU_CAP_NO_INTERRUPT;`
	`121`	`+ pmu->pmu.capabilities \|= PERF_PMU_CAP_NO_EXCLUDE;`
`120`	`122`
`121`	`123`	`perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW);`
`122`	`124`	`}`