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Jocelyn Falempetdz
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drm/mgag200: Fix PLL setup for g200wb and g200ew
commit f86c3ed ("drm/mgag200: Split PLL setup into compute and update functions") introduced a regression for g200wb and g200ew. The PLLs are not set up properly, and VGA screen stays black, or displays "out of range" message. MGA1064_WB_PIX_PLLC_N/M/P was mistakenly replaced with MGA1064_PIX_PLLC_N/M/P which have different addresses. Patch tested on a Dell T310 with g200wb Fixes: f86c3ed ("drm/mgag200: Split PLL setup into compute and update functions") Cc: stable@vger.kernel.org Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220308174321.225606-1-jfalempe@redhat.com
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Lines changed: 3 additions & 3 deletions

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drivers/gpu/drm/mgag200/mgag200_pll.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -404,9 +404,9 @@ mgag200_pixpll_update_g200wb(struct mgag200_pll *pixpll, const struct mgag200_pl
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udelay(50);
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/* program pixel pll register */
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WREG_DAC(MGA1064_PIX_PLLC_N, xpixpllcn);
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WREG_DAC(MGA1064_PIX_PLLC_M, xpixpllcm);
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WREG_DAC(MGA1064_PIX_PLLC_P, xpixpllcp);
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WREG_DAC(MGA1064_WB_PIX_PLLC_N, xpixpllcn);
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WREG_DAC(MGA1064_WB_PIX_PLLC_M, xpixpllcm);
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WREG_DAC(MGA1064_WB_PIX_PLLC_P, xpixpllcp);
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udelay(50);
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