142142
143143struct mtk_pcie_port ;
144144
145+ /**
146+ * enum mtk_pcie_quirks - MTK PCIe quirks
147+ * @MTK_PCIE_FIX_CLASS_ID: host's class ID needed to be fixed
148+ * @MTK_PCIE_FIX_DEVICE_ID: host's device ID needed to be fixed
149+ * @MTK_PCIE_NO_MSI: Bridge has no MSI support, and relies on an external block
150+ */
151+ enum mtk_pcie_quirks {
152+ MTK_PCIE_FIX_CLASS_ID = BIT (0 ),
153+ MTK_PCIE_FIX_DEVICE_ID = BIT (1 ),
154+ MTK_PCIE_NO_MSI = BIT (2 ),
155+ };
156+
145157/**
146158 * struct mtk_pcie_soc - differentiate between host generations
147- * @need_fix_class_id: whether this host's class ID needed to be fixed or not
148- * @need_fix_device_id: whether this host's device ID needed to be fixed or not
149- * @no_msi: Bridge has no MSI support, and relies on an external block
150159 * @device_id: device ID which this host need to be fixed
151160 * @ops: pointer to configuration access functions
152161 * @startup: pointer to controller setting functions
153162 * @setup_irq: pointer to initialize IRQ functions
163+ * @quirks: PCIe device quirks.
154164 */
155165struct mtk_pcie_soc {
156- bool need_fix_class_id ;
157- bool need_fix_device_id ;
158- bool no_msi ;
159166 unsigned int device_id ;
160167 struct pci_ops * ops ;
161168 int (* startup )(struct mtk_pcie_port * port );
162169 int (* setup_irq )(struct mtk_pcie_port * port , struct device_node * node );
170+ enum mtk_pcie_quirks quirks ;
163171};
164172
165173/**
@@ -703,15 +711,15 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
703711 writel (val , port -> base + PCIE_RST_CTRL );
704712
705713 /* Set up vendor ID and class code */
706- if (soc -> need_fix_class_id ) {
714+ if (soc -> quirks & MTK_PCIE_FIX_CLASS_ID ) {
707715 val = PCI_VENDOR_ID_MEDIATEK ;
708716 writew (val , port -> base + PCIE_CONF_VEND_ID );
709717
710718 val = PCI_CLASS_BRIDGE_PCI ;
711719 writew (val , port -> base + PCIE_CONF_CLASS_ID );
712720 }
713721
714- if (soc -> need_fix_device_id )
722+ if (soc -> quirks & MTK_PCIE_FIX_DEVICE_ID )
715723 writew (soc -> device_id , port -> base + PCIE_CONF_DEVICE_ID );
716724
717725 /* 100ms timeout value should be enough for Gen1/2 training */
@@ -1099,7 +1107,7 @@ static int mtk_pcie_probe(struct platform_device *pdev)
10991107
11001108 host -> ops = pcie -> soc -> ops ;
11011109 host -> sysdata = pcie ;
1102- host -> msi_domain = pcie -> soc -> no_msi ;
1110+ host -> msi_domain = !!( pcie -> soc -> quirks & MTK_PCIE_NO_MSI ) ;
11031111
11041112 err = pci_host_probe (host );
11051113 if (err )
@@ -1187,9 +1195,9 @@ static const struct dev_pm_ops mtk_pcie_pm_ops = {
11871195};
11881196
11891197static const struct mtk_pcie_soc mtk_pcie_soc_v1 = {
1190- .no_msi = true,
11911198 .ops = & mtk_pcie_ops ,
11921199 .startup = mtk_pcie_startup_port ,
1200+ .quirks = MTK_PCIE_NO_MSI ,
11931201};
11941202
11951203static const struct mtk_pcie_soc mtk_pcie_soc_mt2712 = {
@@ -1199,19 +1207,18 @@ static const struct mtk_pcie_soc mtk_pcie_soc_mt2712 = {
11991207};
12001208
12011209static const struct mtk_pcie_soc mtk_pcie_soc_mt7622 = {
1202- .need_fix_class_id = true,
12031210 .ops = & mtk_pcie_ops_v2 ,
12041211 .startup = mtk_pcie_startup_port_v2 ,
12051212 .setup_irq = mtk_pcie_setup_irq ,
1213+ .quirks = MTK_PCIE_FIX_CLASS_ID ,
12061214};
12071215
12081216static const struct mtk_pcie_soc mtk_pcie_soc_mt7629 = {
1209- .need_fix_class_id = true,
1210- .need_fix_device_id = true,
12111217 .device_id = PCI_DEVICE_ID_MEDIATEK_7629 ,
12121218 .ops = & mtk_pcie_ops_v2 ,
12131219 .startup = mtk_pcie_startup_port_v2 ,
12141220 .setup_irq = mtk_pcie_setup_irq ,
1221+ .quirks = MTK_PCIE_FIX_CLASS_ID | MTK_PCIE_FIX_DEVICE_ID ,
12151222};
12161223
12171224static const struct of_device_id mtk_pcie_ids [] = {
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