We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
1 parent 4326d02 commit b5f77f4Copy full SHA for b5f77f4
1 file changed
dpctl/tensor/libtensor/include/utils/sycl_utils.hpp
@@ -278,7 +278,8 @@ T custom_inclusive_scan_over_group(GroupT &&wg,
278
// The w/s adds SYCL atomic fence, since the explicit memory fence
279
// prevents reordering/elimination, while it will add slight overhead.
280
T __scan_val = identity;
281
- sycl::atomic_fence(sycl::memory_order::seq_cst, sycl::memory_scope::work_item);
+ sycl::atomic_fence(sycl::memory_order::seq_cst,
282
+ sycl::memory_scope::work_item);
283
if (in_bounds) {
284
__scan_val = local_mem_acc[(offset + lane_id) * max_sgSize - 1];
285
}
0 commit comments