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Document relaxed SIMD feature (#201)
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‎src/compiler.md‎

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@@ -107,6 +107,8 @@ There are several flags that enable or disable specific WebAssembly or compiler
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simd SIMD types and operations.
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reference-types Reference types and operations.
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gc Garbage collection (WIP).
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stringref String reference types.
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relaxed-simd Relaxed SIMD operations.
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--disable Disables WebAssembly features being enabled by default.
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‎src/stdlib/globals.md‎

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@@ -862,9 +862,9 @@ Likewise, these represent the [WebAssembly SIMD](https://github.com/WebAssembly/
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Performs the bitwise `!a` operation on each lane.
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* ```ts
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function v128.bitselect(a: v128, b: v128, mask: v128): v128
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function v128.bitselect(v1: v128, v2: v128, mask: v128): v128
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```
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Selects bits of either vector according to the specified mask.
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Selects bits of either vector according to the specified mask. Selects from `v1` if the bit in `mask` is `1`, otherwise from `v2`.
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* ```ts
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function v128.any_true(a: v128): bool
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* ```ts
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function v128.q15mulr_sat<T>(a: v128, b: v128): v128
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```
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<details><summary>Performs the line-wise saturating rounding multiplication in Q15 format.</summary>
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<details><summary>Performs the line-wise saturating rounding multiplication in Q15 format ((a[i] * b[i] + (1 << (Q - 1))) >> Q where Q=15).</summary>
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| T | Instruction
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|-----|-------------
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```
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Initializes a 128-bit vector from two 64-bit float values.
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#### Relaxed SIMD 🦄
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The following instructions represent the [WebAssembly Relaxed SIMD](https://github.com/WebAssembly/relaxed-simd) specification. Must be enabled with `--enable relaxed-simd`.
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* ```ts
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function v128.relaxed_swizzle(a: v128, s: v128): v128
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```
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Selects 8-bit lanes from `a` using indices in `s`. Indices in the range \[0-15] select the i-th element of `a`.
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Unlike `v128.swizzle`, the result of an out of bounds index is implementation-defined, depending on hardware capabilities: Either `0` or `a[s[i]%16]`.
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* ```ts
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function v128.relaxed_trunc<T>(a: v128): v128
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```
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<details><summary>Truncates each lane of a vector from 32-bit floating point to a 32-bit signed or unsigned integer as indicated by T.</summary>
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| T | Instruction
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|----------|-------------
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| i32 | i32x4.relaxed_trunc_f32x4_s
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| u32 | i32x4.relaxed_trunc_f32x4_u
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</details>
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Unlike `v128.trunc_sat`, the result of lanes out of bounds of the target type is implementation defined, depending on hardware capabilities:
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- If the input lane contains `NaN`, the result is either `0` or the respective maximum integer value.
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- If the input lane contains a value otherwise out of bounds of the target type, the result is either the saturatated result or maximum integer value.
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* ```ts
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function v128.relaxed_trunc_zero<T>(a: v128): v128
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```
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<details><summary>Truncates each lane of a vector from 64-bit floating point to a 32-bit signed or unsigned integer as indicated by T. Unused higher integer lanes of the result are initialized to zero.</summary>
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| T | Instruction
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|----------|-------------
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| i32 | i32x4.relaxed_trunc_f64x2_s_zero
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| u32 | i32x4.relaxed_trunc_f64x2_u_zero
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</details>
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Unlike `v128.trunc_sat_zero`, the result of lanes out of bounds of the target type is implementation defined, depending on hardware capabilities:
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- If the input lane contains `NaN`, the result is either `0` or the respective maximum integer value.
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- If the input lane contains a value otherwise out of bounds of the target type, the result is either the saturatated result or maximum integer value.
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* ```ts
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function v128.relaxed_madd<T>(a: v128, b: v128, c: v128): v128
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```
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<details><summary>Performs the fused multiply-add operation (a * b + c) on 32- or 64-bit floating point lanes as indicated by T.</summary>
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| T | Instruction
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|----------|-------------
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| f32 | f32x4.relaxed_madd
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| f64 | f64x2.relaxed_madd
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</details>
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The result is implementation defined, depending on hardware capabilities:
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- Either `a * b` is rounded once and the final result rounded again, or
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- The expression is evaluated with higher precision and only rounded once
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* ```ts
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function v128.relaxed_nmadd<T>(a: v128, b: v128, c: v128): v128
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```
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<details><summary>Performs the fused negative multiply-add operation (-(a * b) + c) on 32- or 64-bit floating point lanes as indicated by T.</summary>
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| T | Instruction
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|----------|-------------
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| f32 | f32x4.relaxed_nmadd
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| f64 | f64x2.relaxed_nmadd
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</details>
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The result is implementation defined, depending on hardware capabilities:
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- Either `a * b` is rounded once and the final result rounded again, or
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- The expression is evaluated with higher precision and only rounded once
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* ```ts
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function v128.relaxed_laneselect<T>(a: v128, b: v128, m: v128): v128
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```
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<details><summary>Selects 8-, 16-, 32- or 64-bit integer lanes as indicated by T from a or b based on masks in m.</summary>
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| T | Instruction
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|----------|-------------
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| i8, u8 | i8x16.relaxed_laneselect
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| i16, u16 | i16x8.relaxed_laneselect
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| i32, u32 | i32x4.relaxed_laneselect
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| i64, u64 | i64x2.relaxed_laneselect
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</details>
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Behaves like `v128.bitselect` if masks in `m` do have all bits either set (result is `a[i]`) or unset (result is `b[i]`). Otherwise the result is implementation-defined, depending on hardware capabilities: If the most significant bit of `m` is set, the result is either `bitselect(a[i], b[i], mask)` or `a[i]`, otherwise the result is `b[i]`.
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* ```ts
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function v128.relaxed_min<T>(a: v128, b: v128): v128
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```
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<details><summary>Computes the minimum of each 32- or 64-bit floating point lane as indicated by T.</summary>
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| T | Instruction
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|----------|-------------
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| f32 | f32x4.relaxed_min
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| f64 | f64x2.relaxed_min
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</details>
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Unlike `v128.min`, the result is implementation-defined if either value is `NaN` or both are `-0.0` and `+0.0`, depending on hardware capabilities: Either `a[i]` or `b[i]`.
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* ```ts
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function v128.relaxed_max<T>(a: v128, b: v128): v128
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```
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<details><summary>Computes the maximum of each 32- or 64-bit floating point lane as indicated by T.</summary>
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| T | Instruction
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|----------|-------------
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| f32 | f32x4.relaxed_max
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| f64 | f64x2.relaxed_max
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</details>
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Unlike `v128.max`, the result is implementation-defined if either value is `NaN` or both are `-0.0` and `+0.0`, depending on hardware capabilities: Either `a[i]` or `b[i]`.
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* ```ts
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function v128.relaxed_q15mulr<T>(a: v128, b: v128): v128
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```
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<details><summary>Performs the lane-wise rounding multiplication in Q15 format ((a[i] * b[i] + (1 << (Q - 1))) >> Q where Q=15).</summary>
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| T | Instruction
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|----------|-------------
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| i16 | i16x8.relaxed_q15mulr_s
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</details>
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Unlike `v128.q15mulr_sat`, the result is implementation-defined if both inputs are the minimum signed value: Either the minimum or maximum signed value.
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* ```ts
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function v128.relaxed_dot<T>(a: v128, b: v128): v128
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```
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<details><summary>Computes the dot product of two 8-bit integer lanes each, yielding lanes one size wider than the input.</summary>
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| T | Instruction
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|----------|-------------
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| i16 | i16x8.relaxed_dot_i8x16_i7x16_s
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</details>
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Unlike `v128.dot`, if the most significant bit of `b[i]` is set, whether `b[i]` is interpreted as signed or unsigned by the intermediate multiplication is implementation-defined.
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* ```ts
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function v128.relaxed_dot_add<T>(a: v128, b: v128, c: v128): v128
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```
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<details><summary>Computes the dot product of two 8-bit integer lanes each, yielding lanes two sizes wider than the input with the lanes of c accumulated into the result.</summary>
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| T | Instruction
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|----------|-------------
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| i32 | i32x4.relaxed_dot_i8x16_i7x16_add_s
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</details>
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Unlike `v128.dot`, if the most significant bit of `b[i]` is set, whether `b[i]` is interpreted as signed or unsigned by the intermediate multiplication is implementation-defined.
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### Inline instructions
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In addition to using the generic builtins above, most WebAssembly instructions can be written directly in AssemblyScript code. For example, the following is equivalent:

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