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media: imx355: Set binning mode registers programmatically
Store the binning mode in the mode structure and set the registers based on that, rather than having the bare register writes spelled out for each mode. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
1 parent 1714888 commit 35760b1

1 file changed

Lines changed: 31 additions & 42 deletions

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‎drivers/media/i2c/imx355.c‎

Lines changed: 31 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -73,6 +73,10 @@
7373
#define IMX355_TEST_PATTERN_GRAY_COLOR_BARS 3
7474
#define IMX355_TEST_PATTERN_PN9 4
7575

76+
#define IMX355_REG_BINNING_MODE 0x0900
77+
#define IMX355_REG_BINNING_TYPE 0x0901
78+
#define IMX355_REG_BINNING_WEIGHTING 0x0902
79+
7680
/* Flip Control */
7781
#define IMX355_REG_ORIENTATION 0x0101
7882

@@ -117,6 +121,7 @@ struct imx355_mode {
117121
u16 y_add_start;
118122
u16 x_add_end;
119123
u16 y_add_end;
124+
u8 binning_mode;
120125
};
121126

122127
struct imx355_clk_params {
@@ -269,113 +274,71 @@ static const struct imx355_reg_list imx355_global_setting = {
269274
};
270275

271276
static const struct imx355_reg mode_3268x2448_regs[] = {
272-
{ 0x0900, 0x00 },
273-
{ 0x0901, 0x11 },
274-
{ 0x0902, 0x00 },
275277
{ 0x0700, 0x00 },
276278
{ 0x0701, 0x10 },
277279
};
278280

279281
static const struct imx355_reg mode_3264x2448_regs[] = {
280-
{ 0x0900, 0x00 },
281-
{ 0x0901, 0x11 },
282-
{ 0x0902, 0x00 },
283282
{ 0x0700, 0x00 },
284283
{ 0x0701, 0x10 },
285284
};
286285

287286
static const struct imx355_reg mode_3280x2464_regs[] = {
288-
{ 0x0900, 0x00 },
289-
{ 0x0901, 0x11 },
290-
{ 0x0902, 0x00 },
291287
{ 0x0700, 0x00 },
292288
{ 0x0701, 0x10 },
293289
};
294290

295291
static const struct imx355_reg mode_1940x1096_regs[] = {
296-
{ 0x0900, 0x00 },
297-
{ 0x0901, 0x11 },
298-
{ 0x0902, 0x00 },
299292
{ 0x0700, 0x00 },
300293
{ 0x0701, 0x10 },
301294
};
302295

303296
static const struct imx355_reg mode_1936x1096_regs[] = {
304-
{ 0x0900, 0x00 },
305-
{ 0x0901, 0x11 },
306-
{ 0x0902, 0x00 },
307297
{ 0x0700, 0x00 },
308298
{ 0x0701, 0x10 },
309299
};
310300

311301
static const struct imx355_reg mode_1924x1080_regs[] = {
312-
{ 0x0900, 0x00 },
313-
{ 0x0901, 0x11 },
314-
{ 0x0902, 0x00 },
315302
{ 0x0700, 0x00 },
316303
{ 0x0701, 0x10 },
317304
};
318305

319306
static const struct imx355_reg mode_1920x1080_regs[] = {
320-
{ 0x0900, 0x00 },
321-
{ 0x0901, 0x11 },
322-
{ 0x0902, 0x00 },
323307
{ 0x0700, 0x00 },
324308
{ 0x0701, 0x10 },
325309
};
326310

327311
static const struct imx355_reg mode_1640x1232_regs[] = {
328-
{ 0x0900, 0x01 },
329-
{ 0x0901, 0x22 },
330-
{ 0x0902, 0x00 },
331312
{ 0x0700, 0x00 },
332313
{ 0x0701, 0x10 },
333314
};
334315

335316
static const struct imx355_reg mode_1640x922_regs[] = {
336-
{ 0x0900, 0x01 },
337-
{ 0x0901, 0x22 },
338-
{ 0x0902, 0x00 },
339317
{ 0x0700, 0x00 },
340318
{ 0x0701, 0x10 },
341319
};
342320

343321
static const struct imx355_reg mode_1300x736_regs[] = {
344-
{ 0x0900, 0x01 },
345-
{ 0x0901, 0x22 },
346-
{ 0x0902, 0x00 },
347322
{ 0x0700, 0x00 },
348323
{ 0x0701, 0x10 },
349324
};
350325

351326
static const struct imx355_reg mode_1296x736_regs[] = {
352-
{ 0x0900, 0x01 },
353-
{ 0x0901, 0x22 },
354-
{ 0x0902, 0x00 },
355327
{ 0x0700, 0x00 },
356328
{ 0x0701, 0x10 },
357329
};
358330

359331
static const struct imx355_reg mode_1284x720_regs[] = {
360-
{ 0x0900, 0x01 },
361-
{ 0x0901, 0x22 },
362-
{ 0x0902, 0x00 },
363332
{ 0x0700, 0x00 },
364333
{ 0x0701, 0x10 },
365334
};
366335

367336
static const struct imx355_reg mode_1280x720_regs[] = {
368-
{ 0x0900, 0x01 },
369-
{ 0x0901, 0x22 },
370-
{ 0x0902, 0x00 },
371337
{ 0x0700, 0x00 },
372338
{ 0x0701, 0x10 },
373339
};
374340

375341
static const struct imx355_reg mode_820x616_regs[] = {
376-
{ 0x0900, 0x01 },
377-
{ 0x0901, 0x44 },
378-
{ 0x0902, 0x00 },
379342
{ 0x0700, 0x02 },
380343
{ 0x0701, 0x78 },
381344
};
@@ -413,6 +376,7 @@ static const struct imx355_mode supported_modes[] = {
413376
.y_add_start = 0x0000,
414377
.x_add_end = 0x0ccf,
415378
.y_add_end = 0x099f,
379+
.binning_mode = 0x11,
416380
},
417381
{
418382
.width = 3268,
@@ -429,6 +393,7 @@ static const struct imx355_mode supported_modes[] = {
429393
.y_add_start = 0x0008,
430394
.x_add_end = 0x0ccb,
431395
.y_add_end = 0x997,
396+
.binning_mode = 0x11,
432397
},
433398
{
434399
.width = 3264,
@@ -445,6 +410,7 @@ static const struct imx355_mode supported_modes[] = {
445410
.y_add_start = 0x0008,
446411
.x_add_end = 0x0cc7,
447412
.y_add_end = 0x0997,
413+
.binning_mode = 0x11,
448414
},
449415
{
450416
.width = 1940,
@@ -461,6 +427,7 @@ static const struct imx355_mode supported_modes[] = {
461427
.y_add_start = 0x02ac,
462428
.x_add_end = 0x0a33,
463429
.y_add_end = 0x06f3
430+
.binning_mode = 0x11,
464431
},
465432
{
466433
.width = 1936,
@@ -477,6 +444,7 @@ static const struct imx355_mode supported_modes[] = {
477444
.y_add_start = 0x02ac,
478445
.x_add_end = 0x0a2f,
479446
.y_add_end = 0x06f3,
447+
.binning_mode = 0x11,
480448
},
481449
{
482450
.width = 1924,
@@ -493,6 +461,7 @@ static const struct imx355_mode supported_modes[] = {
493461
.y_add_start = 0x02b4,
494462
.x_add_end = 0x0a2b,
495463
.y_add_end = 0x06eb,
464+
.binning_mode = 0x11,
496465
},
497466
{
498467
.width = 1920,
@@ -509,6 +478,7 @@ static const struct imx355_mode supported_modes[] = {
509478
.y_add_start = 0x02b4,
510479
.x_add_end = 0x0a27,
511480
.y_add_end = 0x06eb,
481+
.binning_mode = 0x11,
512482
},
513483
{
514484
.width = 1640,
@@ -525,6 +495,7 @@ static const struct imx355_mode supported_modes[] = {
525495
.y_add_start = 0x0000,
526496
.x_add_end = 0x0ccf,
527497
.y_add_end = 0x099f,
498+
.binning_mode = 0x22,
528499
},
529500
{
530501
.width = 1640,
@@ -541,6 +512,7 @@ static const struct imx355_mode supported_modes[] = {
541512
.y_add_start = 0x0130,
542513
.x_add_end = 0x0ccf,
543514
.y_add_end = 0x0863,
515+
.binning_mode = 0x22,
544516
},
545517
{
546518
.width = 1300,
@@ -557,6 +529,7 @@ static const struct imx355_mode supported_modes[] = {
557529
.y_add_start = 0x01f0,
558530
.x_add_end = 0x0b7f,
559531
.y_add_end = 0x07af,
532+
.binning_mode = 0x22,
560533
},
561534
{
562535
.width = 1296,
@@ -573,6 +546,7 @@ static const struct imx355_mode supported_modes[] = {
573546
.y_add_start = 0x01f0,
574547
.x_add_end = 0x0b77,
575548
.y_add_end = 0x07af,
549+
.binning_mode = 0x22,
576550
},
577551
{
578552
.width = 1284,
@@ -589,6 +563,7 @@ static const struct imx355_mode supported_modes[] = {
589563
.y_add_start = 0x0200,
590564
.x_add_end = 0x0b6f,
591565
.y_add_end = 0x079f,
566+
.binning_mode = 0x22,
592567
},
593568
{
594569
.width = 1280,
@@ -605,6 +580,7 @@ static const struct imx355_mode supported_modes[] = {
605580
.y_add_start = 0x0200,
606581
.x_add_end = 0x0b67,
607582
.y_add_end = 0x079f,
583+
.binning_mode = 0x22,
608584
},
609585
{
610586
.width = 820,
@@ -621,6 +597,7 @@ static const struct imx355_mode supported_modes[] = {
621597
.y_add_start = 0x0000,
622598
.x_add_end = 0x0ccf,
623599
.y_add_end = 0x099f,
600+
.binning_mode = 0x44,
624601
},
625602
};
626603

@@ -997,6 +974,18 @@ static int imx355_start_streaming(struct imx355 *imx355)
997974
if (ret)
998975
return ret;
999976

977+
ret = imx355_write_reg(imx355, IMX355_REG_BINNING_MODE, 1,
978+
mode->binning_mode == 0x11 ? 0x00 : 0x01);
979+
if (ret)
980+
return ret;
981+
ret = imx355_write_reg(imx355, IMX355_REG_BINNING_TYPE, 1,
982+
mode->binning_mode);
983+
if (ret)
984+
return ret;
985+
ret = imx355_write_reg(imx355, IMX355_REG_BINNING_WEIGHTING, 1, 0x00);
986+
if (ret)
987+
return ret;
988+
1000989
/* Set PLL registers for the external clock frequency */
1001990
ret = imx355_write_reg(imx355, IMX355_REG_EXTCLK_FREQ, 2,
1002991
imx355->clk_params->extclk_freq);

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